Processor Configuration Registers
2.6.22
INTRLINE—Interrupt Line Register
This register contains interrupt line routing information. The device itself does not use
this value; rather, it is used by device drivers and operating systems to determine
priority and vector information.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/1/0–2/PCI
3Ch
00h
RW
8 bits
Size:
Reset
Value
RST/
PWR
Bit
Access
Description
Interrupt Connection (INTCON)
This field is used to communicate interrupt line routing
information.
BIOS Requirement: POST software writes the routing
information into this register as it initializes and configures the
system. The value indicates to which input of the system
interrupt controller this device's interrupt pin is connected.
7:0
RW
00h
Uncore
2.6.23
INTRPIN—Interrupt Pin Register
This register specifies which interrupt pin this device uses.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/1/0–2/PCI
3Dh
01h
RW-O, RO
8 bits
Size:
Reset
Value
RST/
PWR
Bit
Access
Description
7:3
RO
00h
Uncore
Reserved (RSVD)
Interrupt Pin (INTPIN)
As a multifunction device, the PCI Express device may specify
any INTx (x=A,B,C,D) as its interrupt pin.
The Interrupt Pin register indicates which interrupt pin the device
(or device function) uses.
A value of 1 corresponds to INTA# (Default)
A value of 2 corresponds to INTB#
A value of 3 corresponds to INTC#
A value of 4 corresponds to INTD#
2:0
RW-O
1h
Uncore
Devices (or device functions) that do not use an interrupt pin
must put a 0 in this register.
The values 05h through FFh are reserved.
This register is write once. BIOS must set this register to select
the INTx to be used by this root port.
102
Datasheet, Volume 2
INTEL [ INTEL ]
