Electrical Specifications
Table 2-14. Parameter Values for Intel QPI at 6.4 GT/s (Sheet 2 of 2)
Symbol
Parameter
Min
-0.5
Nom
Max
0.5
Unit
Notes
T
Delay of any data lane relative to
clock lane, as measured at Tx
output
UI
Tx-data-clk-skew-pin
V
Voltage eye opening at the end of 155
Tx+ channel for any data or clock
channel measured with a
cumulative probability of 1E-9
(UI).
1200
mV
2
Rx-diff-pp-pin
T
T
Timing eye opening at the end of
Tx+ channel for any data or clock
channel measured with a
0.61
1
3
UI
UI
Rx-diff-pp-pin
cumulative probability of 1E-9 (UI)
Delay of any data lane relative to
the clock lane, as measured at the
end of Tx+ channel. This
-1
Rx-data-clk-skew-pin
parameter is a collective sum of
effects of data clock mismatches
in Tx and on the medium
connecting Tx and Rx.
VRx-CLK
Forward CLK Rx input voltage
sensitivity (differential pp)
150
350
mV
mV
V
V
DC common mode ranges at the
Rx input for any data or clock
channel
90
Rx-cm-dc-pin
Rx-cm-ac-pin
AC common mode ranges at the
Rx input for any data or clock
channel, defined as:
-50
50
mV
((V
+ V /2 - V
)
RX-cm-dc-pin
D+
D-
Notes:
1.
1300 mVpp swing is recommended when CPU to CPU length is within 2” of PDG max trace length. Note that
default value is 1100mVpp.
2.
Measure AC CM noise at the TX and decimate to its spectral components. For all spectral components above
3.2 GHz, apply the attenuation of the channel at the appropriate frequency. If the resultant AC CM at the
receiver is met after taking out the appropriate spectral components meets the RX AC CM spec then we can
allow the transmitter AC CM noise to pass.
3.
4.
Measured with victim lane running clock pattern, neighboring aggressor lanes running DC pattern and far
aggressor lanes running PRBS pattern.
DC CM can be relaxed to 0.20 and 0.30 Vdiffp-p swing if RX has wide DC common mode range.
2.5.3
2.5.4
Intel SMI Signaling Specifications
This section defines the high-speed differential point-to-point signaling link for Intel
SMI. The link consists of a transmitter and a receiver and the interconnect in between
them. The specifications described in this section covers 6.4 Gb/s operation.
Reference Intel SMI high-speed differential PTP link is at 1.5 V.
Intel SMI Transmitter and Receiver Specifications
All TX-RX links are DC-coupled and the TX and RX pins adhere to the return loss
specifications for continuous transmission operation.
34
Datasheet Volume 1 of 2
INTEL [ INTEL ]
