Chipset Configuration Registers
Bit
Description
6:5
(Consumer Reserved
Only)
Intel® High Definition Audio Disable (HDAD) — R/W. Default is 0.
0 = The Intel High Definition Audio controller is enabled.
1 = The Intel High Definition Audio controller is disabled and its PCI configuration
space is not accessible.
4
SMBus Disable (SD) — R/W. Default is 0.
0 = The SMBus controller is enabled.
1 = The SMBus controller is disabled. In ICH5 and previous, this also disabled the I/
O space. In ICH10, it only disables the configuration space.
3
2
Serial ATA Disable 1 (SAD1) — R/W. Default is 0.
0 = The SATA controller #1 (D31:F2) is enabled.
1 = The SATA controller #1 (D31:F2) is disabled.
1
0
Reserved
BIOS must set this bit to 1b.
10.1.78 CG—Clock Gating
Offset Address: 341C–341Fh
Attribute:
Size:
R/W
32-bit
Default Value:
00000000h
Bit
Description
Legacy (LPC) Dynamic Clock Gate Enable — R/W.
31
30
0 = Legacy Dynamic Clock Gating is Disabled
1 = Legacy Dynamic Clock Gating is Enabled
Reserved
USB UHCI Dynamic Clock Gate Enable — R/W.
0 = USB UHCI Dynamic Clock Gating is Disabled
1 = USB UHCI Dynamic Clock Gating is Enabled
29:28
0 = Reserved
1 = Reserved
SATA Port 3 Dynamic Clock Gate Enable — R/W.
27
26
25
24
0 = SATA Port 3 Dynamic Clock Gating is Disabled
1 = SATA Port 3 Dynamic Clock Gating is Enabled
SATA Port 2 Dynamic Clock Gate Enable — R/W.
0 = SATA Port 2 Dynamic Clock Gating is Disabled
1 = SATA Port 2 Dynamic Clock Gating is Enabled
SATA Port 1 Dynamic Clock Gate Enable — R/W.
0 = SATA Port 1 Dynamic Clock Gating is Disabled
1 = SATA Port 1 Dynamic Clock Gating is Enabled
SATA Port 0 Dynamic Clock Gate Enable — R/W.
0 = SATA Port 0 Dynamic Clock Gating is Disabled
1 = SATA Port 0 Dynamic Clock Gating is Enabled
350
Datasheet
INTEL [ INTEL ]
