Functional Description
5.19
USB EHCI Host Controllers (D29:F7 and D26:F7)
The ICH10 contains two Enhanced Host Controller Interface (EHCI) host controllers
which support up to twelve USB 2.0 high-speed root ports. USB 2.0 allows data
transfers up to 480 Mb/s using the same pins as the twelve USB full-speed/low-speed
ports. The ICH10 contains port-routing logic that determines whether a USB port is
controlled by one of the UHCI controllers or by one of the EHCI controllers. USB 2.0
based Debug Port is also implemented in the ICH10.
A summary of the key architectural differences between the USB UHCI host controllers
and the EHCI host controller are shown in Table 5-46.
Table 5-46. UHCI vs. EHCI
Parameter
USB UHCI
I/O space
USB EHCI
Accessible by
Memory Space
Separated into Periodic and Asynchronous
lists
Memory Data Structure
Differential Signaling Voltage
Ports per Controller
Single linked list
3.3 V
2
400 mV
6 or 8 (controller #1) and 6 or 4
(Controller #2)
5.19.1
5.19.1.1
5.19.1.2
EHC Initialization
The following descriptions step through the expected ICH10 Enhanced Host Controller
(EHC) initialization sequence in chronological order, beginning with a complete power
cycle in which the suspend well and core well have been off.
BIOS Initialization
BIOS performs a number of platform customization steps after the core well has
powered up. Contact your Intel Field Representative for additional ICH10 BIOS
information.
Driver Initialization
See Chapter 4 of the Enhanced Host Controller Interface Specification for Universal
Serial Bus, Revision 1.0.
Datasheet
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INTEL [ INTEL ]
