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317607-001 参数 Datasheet PDF下载

317607-001图片预览
型号: 317607-001
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 351 页 / 2481 K
品牌: INTEL [ INTEL ]
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Integrated Graphics Device Registers (D2:F0,F1)  
8.1.34  
PMCS—Power Management Control/Status  
B/D/F/Type:  
Address Offset:  
Default Value:  
Access:  
0/2/0/PCI  
D4–D5h  
0000h  
RO, RW  
16 bits  
Size:  
Bit  
15  
Access &  
Description  
Default  
RO  
0b  
PME Status (PMESTS): This bit is 0 to indicate that IGD does not  
support PME# generation from D3 (cold).  
14:13  
12:9  
8
RO  
00b  
Data Scale (DSCALE): The IGD does not support data register. This  
bit always returns 00 when read, write operations have no effect.  
RO  
0h  
Data Select (DSEL): The IGD does not support data register. This bit  
always returns 0h when read, write operations have no effect.  
RO  
0b  
PME Enable (PME_EN): This bit is 0 to indicate that PME# assertion  
from D3 (cold) is disabled.  
7:2  
1:0  
RO  
00h  
Reserved  
RW  
00b  
Power State (PWRSTAT): This field indicates the current power  
state of the IGD and can be used to set the IGD into a new power  
state. If software attempts to write an unsupported state to this field,  
write operation must complete normally on the bus, but the data is  
discarded and no state change occurs. On a transition from D3 to D0  
the graphics controller is optionally reset to initial values.  
00 = D0 (Default)  
01 = D1 (Not Supported)  
10 = D2 (Not Supported)  
11 = D3  
Datasheet  
245