Integrated Graphics Device Registers (D2:F0,F1)
Address
Offset
Register
Symbol
Register Name
Default
Value
Access
RO
62h
C0h
MSAC
Mirror of Dev2 Func0 Multi Size
Aperture Control
02h
00h
GDRST
Mirror of Dev2 Func0 Graphics
Reset
RO
C1–C3h
MI_GFX_CG_
DIS
Mirror of Fun 0 MI GFX Unit Level
Clock Ungating
000000h
RO
C4–C7h
C8h
RSVD
RSVD
Reserved
Reserved
Reserved
00000000h
00h
RO
RO
RO
RO
CA–CBh
CC–CDh
RSVD
0000h
GCDGMBUS
Mirror of Dev2 Func0 Graphics
Clock Frequency Register for
GMBUS unit
0000h
D0–D1h
D2–D3h
PMCAPID
PMCAP
Mirror of Fun 0 Power
Management Capabilities ID
0001h
0022h
RO
RO
Mirror of Fun 0 Power
Management Capabilities
D4–D5h
D8–DBh
E0–E1h
E4–E7h
PMCS
RSVD
SWSMI
ASLE
Power Management Control/Status
Reserved
0000h
00000000h
0000h
RO, RW
RO
Mirror of Func0 Software SMI
RO
Mirror of Dev2 Func0 System
Display Event Register
00000000h
RO
F0–F3h
GCFGC
Mirror of Dev2 Func0 Graphics
Clock Frequency and Gating
Control
00000000h
RO/P,
RO
F4–F7h
FC–FFh
RSVD
ASLS
Mirror of Fun 0 Reserved for LBB-
Legacy Backlight Brightness
00000000h
00000000h
RO
ASL Storage
RW
248
Datasheet
INTEL [ INTEL ]
