PCI Express* Registers (D1:F0)
6.1.58
PEGSSTS—PCI Express*-G Sequence Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
0/1/0/MMR
218–21Fh
0000000000000FFFh
RO
64 bits
Size:
This register provides PCI Express status reporting that is required by the PCI Express
specification.
Bit
Access &
Default
Description
63:60
59:48
RO
0h
Reserved
RO
000h
Next Transmit Sequence Number (NTSN): This field indicates the
value of the NXT_TRANS_SEQ counter. This counter represents the
transmit Sequence number to be applied to the next TLP to be
transmitted onto the Link for the first time.
47:44
43:32
RO
0h
Reserved
RO
000h
Next Packet Sequence Number (NPSN): This field indicates the
packet sequence number to be applied to the next TLP to be
transmitted or re-transmitted onto the Link.
31:28
27:16
RO
0h
Reserved
RO
000h
Next Receive Sequence Number (NRSN): This field is the
sequence number associated with the TLP that is expected to be
received next.
15:12
11:0
RO
0h
Reserved
RO
Last Acknowledged Sequence Number (LASN): This field is the
FFFh
sequence number associated with the last acknowledged TLP.
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Datasheet
INTEL [ INTEL ]
