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28F320J5 参数 Datasheet PDF下载

28F320J5图片预览
型号: 28F320J5
PDF下载: 下载PDF文件 查看货源
内容描述: 的StrataFlash存储器技术32和64 MBIT [StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT]
分类和应用: 存储
文件页数/大小: 53 页 / 638 K
品牌: INTEL [ INTEL ]
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E
INTEL StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT  
Table 5. Summary of Query Structure Output as a Function of Device and Mode  
Device  
type/  
Query start  
location  
Query data with  
Query  
start  
address  
in bytes  
Query data with  
byte addressing  
maximum device  
mode  
in maximum  
device  
bus width addressing  
“x” = ASCII equivalent  
bus width  
addresses  
x16 device/  
x16 mode  
10h  
10h: 0051h  
11h: 0052h  
12h: 0059h  
“Q”  
“R”  
“Y”  
20h  
20h  
20h: 51h  
21h: 00h  
22h: 52h  
“Q”  
null  
“R”  
x16 device/  
x8 mode  
N/A(1)  
N/A(1)  
20h: 51h  
21h: 51h  
22h: 52h  
“Q”  
“Q”  
“R”  
NOTE:  
1. The system must drive the lowest order addresses to access all the device’s array data when the device is configured in x8  
mode. Therefore, word addressing where these lower addresses not toggled by the system is“Not Applicable” for x8-  
configured devices.  
Table 6. Example of Query Structure Output of a x16- and x8-Capable Device  
Device  
Address  
Word Addressing:  
Query Data  
Byte  
Address  
Byte Addressing:  
Query Data  
A16–A1  
D15–D0  
A7–A0  
D7–D0  
0010h  
0011h  
0012h  
0013h  
0014h  
0015h  
0016h  
0017h  
0018h  
...  
0051h  
“Q”  
“R”  
“Y”  
PrVendor  
ID #  
PrVendor  
TblAdr  
AltVendor  
ID #  
20h  
21h  
22h  
23h  
24h  
25h  
26h  
27h  
28h  
...  
51h  
51h  
52h  
52h  
59h  
59h  
P_IDLO  
P_IDLO  
P_IDHI  
...  
“Q”  
“Q”  
“R”  
“R”  
“Y”  
“Y”  
PrVendor  
ID #  
0052h  
0059h  
P_IDLO  
P_IDHI  
PLO  
PHI  
A_IDLO  
A_IDHI  
...  
19  
ADVANCE INFORMATION  
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