fido2100 3-Port Industrial Ethernet DLR Switch with IEEE1588
Data Sheet
April 10, 2013
p2seed Port 2 Seed. When the port 2 is in half duplex mode, this field can be used to
load a 10-bit seed value into the linear feedback shift register that is used for
the truncated binary exponential back off algorithm.
9.2.20 Host CPU MAC Address Register
Mnemonic
type offset bits 15
R/W 0x5A
14
13
12
11
0
10
0
9
8
7
6
5
0
5
0
4
0
4
0
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0
MAC_Lo_Lo
MACAddress[15:0]
Power-up Defaults
0
0
0
0
0
9
0
8
0
7
0
6
Mnemonic
type offset bits 15
R/W 0x5C
14
0
13
0
12
0
11
0
10
0
MAC_Lo_Hi
MACAddress[31:16]
Power-up Defaults
0
0
0
0
0
Mnemonic
type offset bits 15
R/W 0x5E
14
0
13
0
12
0
11
0
10
0
9
8
7
6
5
0
4
0
3
0
2
0
1
0
0
0
MAC_Hi_Lo
MACAddress[47:32]
Power-up Defaults
0
0
0
0
0
The Host CPU MAC Address register consists of three 16-bit registers. This register
should be set to the same unicast MAC address as the host CPU MAC address. For
example to load the MAC address 00-11-22-33-44-55, 0x0011 should be written to the
MAC_Hi_Lo, 0x2233 should be written to the MAC_Lo_Hi, and 0x4455 should be
written to the MAC_Lo_Lo. The content of this register is used to perform filtering inside
the switch. Unicast frames cannot be received on the host until this register is set. The
switch performs limited filtering of unicast frames. When a unicast frame is received on
any port with a destination address equal to the host MAC address, then that frame is
delivered to the host and is not forwarded to the other port. If a unicast frame is received
on any port with a destination address not equal to the host MAC address, then it is only
forwarded to the other port, but not to the host. Reads and writes of the three 16-bit
registers can be performed in any order.
66
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