fido2100 3-Port Industrial Ethernet DLR Switch with IEEE1588
Data Sheet
April 10, 2013
9.2.21 Multicast Hash Filter Index and Value Registers
Mnemonic
type offset bits 15
14
13
12
11
10
9
8
0
7
0
6
0
5
0
4
3
2
1
0
0
MCHFI
R/W 0x60
MulticastHashIndex[6:0]
Power-up Defaults
0
0
0
0
0
0
0
0
0
0
0
Mnemonic
type offset bits 15
R/W 0x62
14
0
13
0
12
0
11
0
10
0
9
8
7
6
5
0
4
0
3
0
2
0
1
0
0
0
MCHFV
MulticastHashValue[15:0]
Power-up Defaults
0
0
0
0
0
The Multicast Hash Filter consists of one hundred and twenty eight (128) 16-bit registers.
These 128 registers comprise a 2048 bin hash filter table, with bit 0 of register 0
corresponding to bin 0, and bit 15 of register 127 corresponding to bin 2047. In order to
access a filter register, the register number should first be written to the Multicast Hash
Filter Index register. The register value can then be read from/written to through the
Multicast Hash Filter Value register. When a multicast frame is received on an external
port, the CRC is computed on the received multicast address, and the bottom 11 bits of
the CRC are used to select the bin in the multicast hash filter table. If the selected bin is
set, then the frame will be delivered to the host CPU. The algorithm used to compute the
CRC is the same as the Ethernet CRC. One version of the CRC code is enclosed for
reference. A table driven version of the Ethernet CRC code can also be used for speed.
For example, to receive multicast address 01-00-5E-00-01-81 (CRC=0xD2E88860),
register 6, bit 0 must be set. Note that the filter table need not be set for receiving
multicast ring frames.
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