fido2100 3-Port Industrial Ethernet DLR Switch with IEEE1588
Data Sheet
April 10, 2013
p2l
Port 2 Loop IRQ. When a frame with the same source address field as the
host CPU MAC address is received on port 2, this bit is set. When the p2lm bit
in the Switch Control register is also set, an interrupt is delivered to the host
CPU. This bit indicates a network misconnection resulting in a loop when not
in ring redundancy mode. This should be flagged to the user, indicating a
network fault condition. This bit can be cleared by writing a ‘1’ to it.
pit
lst1
lst2
Periodic Interval Timer IRQ. When the periodic interval timer expires (i.e.
counts down to zero) this bit is set. When the pitm bit in the Switch Mask
register is also set, an interrupt is delivered to the host CPU. This bit can be
reset by writing a ‘1’ to it.
Port 1 Link Status. This bit reflects the port 1 link status from the
P1_LNKSTS input signal. A ‘1’ indicates a valid link has been established (i.e.
link pass status) and a ‘0’ indicates link fail status. This is a read only bit,
writes will be ignored.
Port 2 Link Status. This bit reflects the port 2 link status from the
P2_LNKSTS input signal. A ‘1’ indicates a valid link has been established (i.e.
link pass status) and a ‘0’ indicates link fail status. This is a read only bit,
writes will be ignored.
9.2.17 Switch IRQ Mask Register
Mnemonic
type offset bits 15
R/W 0x54
14
13
0
12
0
11
0
10
9
8
7
6
5
4
3
2
1
0
SW_Mask
pitm p2lm p1lm btm2 btm1 brm2 brm1 rbm2 rbm1 l2m l1m
Power-up Defaults
0
0
0
0
0
0
0
0
0
0
0
0
0
l1m
Port 1 Link Status Change IRQ Mask. When this bit is set and the lirq1 bit
in the Switch Event register is also set, then an interrupt is delivered to the host
CPU.
l2m
Port 2 Link Status Change IRQ Mask. When this bit is set and the lirq2 bit
in the Switch Event register is also set, then an interrupt is delivered to the host
CPU.
rbm1
Port 1 Ring Beacon State Change IRQ Mask. When this bit is set and the
rbs1 bit in the Switch Event register is also set, an interrupt is delivered to the
host CPU.
64
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