IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
TRHAV
RD Inactive to Address Active
TCLCL - 15
ns
Equal Loading
TCHSH (1) (2)
(3)
(4)
(6)
(5)
Figure 12. Read Cycle Waveforms
Please note that pins indicated in the parentheses are for the IA188XL version.
Notes:
(1) The OEM part (80C186XL) operates differently in that it deasserts on the falling edge of
CLKOUT.
(2) Status is inactive in the state preceding T4.
(3) Only TCLCSV is applicable if latched A1 and A2 are selected instead of PCS5 and PCS6.
(4) This applies when a write cycle is followed by read cycle.
(5) This is T1 of next bus cycle.
(6) This changes in the T-state preceding the next bus cycle if followed by a write.
®
IA211080711-09
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