IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
4.2
Operating Modes
During reset the IA186XL can be configured to enable special operating modes described as
follows.
4.2.1 Enhanced Mode
If Enhanced Mode is enabled, the IA186XL has DRAM refresh, Power-Save and coprocessor
support available in addition to the normal features available in Compatible Mode. Enhanced
Mode will be invoked automatically if a coprocessor is attached. It can also be entered by tying
the reset output to the test_n/busy input. An internal pull-up keeps the part from entering
Enhanced mode during normal operation.
When not in Enhanced Mode, none of the Enhanced Mode registers can be accessed. Queue-
Status functions, except for the coprocessor support, will be available when not in Enhanced
Mode.
4.2.2 Queue Status Mode
When Queue Status Mode is enabled, information about the instruction queue is output on the
ale/qs0 and wr_n/qs1 pins. To enter Queue Status Mode, the rd_n input should be tied low. It is
sampled at reset, and if low, Queue Status Mode is entered. An internal pull-up keeps the part
from entering Queue Status mode during normal operation.
4.2.3 ONCE Mode
ONCE mode is a special test mode where all pins are set to a high impedance state. ONCE mode
is entered by forcing lcs_n and ucs_n low during reset. These pins are sampled on the rising
edge of res but should be held low for at least a full clock cycle after res goes high. ONCE mode
is exited by reseting the part with lcs_n and ucs_n high. Internal pull-ups keep the part from
entering ONCE mode during normal operation.
4.2.4 Math Coprocessor (IA186XL Only)
When Enhanced mode is enabled, the IA186XL is configured to interface with a math
coprocessor via three of the middle chip select pins. Pin mcs0/pereq is used for Processor
Extension Request. Pin mcs1/error is used for coprocessor error indication. Pin mcs3/nps is
used for Numeric Processor Select.
®
IA211080711-09
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