IA186XL/IA188XL
16-Bit Microcontrollers
Data Sheet
July 6, 2011
The rd_n/qsmd_n, ucs_n, lcs_n, mcs0_n/pereq, mcs1_n/error_n, and test_n/busy pins include
internal pull-ups that are active while res_n is applied. The state of these pins during reset
controls invoking various alternative operating modes as described below:
1 ONCE Mode – ucs_n and lcs_n driven low.
2 Enhanced Mode – test_n/busy driven low then high.
3 Queue Status Mode – rd_n/qsmd_n driven low.
4.1.2 Clock Generator
The IA186XL/IA188XL uses an on-chip clock generator to supply internal and external clocks.
The clock generator makes use of a crystal oscillator and includes a divide-by-two counter.
Figure 11 shows the various operating modes of the clock circuit. The clock circuit can use
either a parallel resonant fundamental mode crystal network (A) or a third-overtone mode crystal
network (B), or it can be driven by an external clock source (C).
The following parameters are recommended when choosing a crystal:
Temperature Range: Application Specific
ESR (Equivalent Series Resistance): 60 max
C0 (Shunt Capacitance of Crystal): 7.0 pF max
CL (Load Capacitance): 20 pF ± 2 pF
Drive Level: 2 mW max
4.1.3 Interrupt Control Unit
The IA186XL operates with several interrupt sources. A separate Interrupt Control Unit
manages all sources based on priority to be individually handled by the CPU. The DMA and
Timers produce internally generated requests. There are five externally generated interrupts - a
single NMI and 4 others.
4.1.4 Timer/Counter Unit
There are three programmable internal timers in the IA186XL. Two are very flexible and can be
configured for many tasks. Each of these has a single input used for either control or clocking,
and a single output to generate waveforms. The third timer is simpler and can only be clocked
from an internal source. It can be used for simple timing applications. It can also be used as a
prescaler to the other two timers or as a trigger for DMA requests.
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