Forced Quasi Resonant ZVS flyback controller
Electrical Characteristics
1), 2),low line use case
1), 2),high line use case
1), 2),low line use case
1), 2),high line use case
1), 2),low line use case
1), 2),high line use case
CS limit at setpoint E
229
189
35
-
260
227
67
289
275
96
mV
mV
mV
mV
mV
mV
VCSCLL
VCSCHL
VCSCLL
CS limit at setpoint F
33
82
VCSCHL
VCSminLL
VCSminHL
Minimum CS limit at burst
mode entry
35
0
67
96
33
82
Burst sequence:
1st pulse CS limit
—
—
—
—
—
—
78
44
78
44
78
44
78
—
—
—
—
—
—
mV
mV
mV
mV
mV
mV
mV
1), 2),low line use case
1), 2),high line use case
1), 2),low line use case
1), 2),high line use case
1), 2),low line use case
1), 2),high line use case
VCSBSP1LL
VCSBSP1HL
VCSBSP2LL
VCSBSP2HL
VCSBSP3LL
VCSBSP3HL
VCSBSP4LL
Burst sequence:
2nd pulse CS limit
Burst sequence:
3rd pulse CS limit
Maximum CS limit during
burst mode operation
1), 2), low line use case
4th and consecutive
pulses after start of
burst sequence
44
mV
1), 2), high line use case
4th and consecutive
pulses after start of
burst sequence
VCSBSP4HL
CS limit for 1st pulse
directly after BM exit
86
52
—
mV
mV
mV
mV
mV
1), 2),low line use case
1), 2),high line use case
1), 2),low line use case
1), 2),high line use case
VCSBMEXLL
VCSBMEXHL
VCSSSLL
Initial soft-start CS limit
limitation without PDC
24
46
—
83
—
129
—
VCSSSHL
∆VCSS
1), 2),step every t
Soft-start step for cycle by
cycle limitation
1) Not tested in production test.
1.71
VCSS
2) See configuration Chapter 5.
3) Min. and max. values are based on master clock period tMCLK limits (see Table 19).
Table 18
Electrical Characteristics of GDx pin
Parameter
Symbol
Min.
Values
Unit Note/Test Condition
Typ.
Max.
Low state sink peak current
Low state resistance
500
—
—
mA
IGDxLPKSNK
1), VGDx=4 V,
C
Load=2 nF
—
—
6.5
RGDxLSNK
Ω
2), 3), CLoad=2 nF
High state peak source
current of GD1
100
118
136
mA
-IGD1HPKSRC
Data Sheet
46
Revision 2.0
2020-08-20
INFINEON [ Infineon ]
