TC39x BC/BD-Step
Electrical SpecificationFlash Target Parameters
Table 3-75 Flash (cont’d)
Parameter
Symbol
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
Program time data flash per
page 1)2)
t
t
PRD CC
-
-
75
µs
s
8 Byte
Complete Device Flash Erase
Time PFlash and DFlash 1)3) 4) 5)
ER_Dev CC
-
10.4
18.5 1)3)4)5)
Valid for less than 1000
cycles, w/o UCB.
Derived value for
documentation
purpose.
Data Flash program time per
burst 1)2)
t
t
PRDB CC
-
-
-
-
-
-
-
-
140
120
2
µs
µs
µs
32 Byte
Data Flash suspend to read
latency 1)
SPNDD CC
Wait time after margin change tFL_MarginDel
CC
Program Flash Endurance per
Logical Sector
N
E_P CC
1000
cycles Replace logical sector
commandshall beused
if a sector fails during
erase or program
Number of erase operations per NERP CC
physical sector in program flash
-
-
-
-
16000
cycles
Program Flash Retention Time, tRET CC
Sector
20
20
-
-
years Max. 1000
erase/program cycles
UCB Retention Time
t
RTU CC
years Max. 100
erase/program cycles
per UCB, max 500
erase/program cycles
for all UCBs together
Data Flash access delay
Data Flash ECC Delay
t
t
t
t
DF CC
-
-
-
-
-
-
-
-
100
20
ns
ns
ns
ns
see RFLASH of DMU
register HF_DWAIT
DFECC CC
PF CC
see RECC of DMU
register HF_DWAIT
Program Flash access delay
Program Flash ECC delay
30
see RFLASH of DMU
register HF_PWAIT
PFECC CC
10
see RECC and CECC
of DMU register
HF_PWAIT
Number of erase operations on NERD0C CC
DF0 over lifetime (complement
sensing mode) 6)
-
-
-
-
4000000 cycles
Number of erase operations on NERD0S CC
DF0 over lifetime (single ended
sensing mode) 7)
750000
cycles
Data Sheet
511
V 1.2, 2021-03
OPEN MARKET VERSION
INFINEON [ Infineon ]
