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SAK-TC399XP-256F300S BC 参数 Datasheet PDF下载

SAK-TC399XP-256F300S BC图片预览
型号: SAK-TC399XP-256F300S BC
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内容描述: [Infineon releases its second generation AURIX microcontroller in embedded flash 40 nm technology. It comes back with an increase in performance, memory sizes, connectivity and more scalability to address the new automotive trends and challenges. This family has more than 20 products to provide the most scalable portfolio of safety microcontrol­ler. In terms of performance, the highest end product TC39x offers 6 cores running at 300 MHz and up to 6.9 MBytes embedded RAM, and consuming below 2 W. ]
分类和应用:
文件页数/大小: 548 页 / 21256 K
品牌: INFINEON [ Infineon ]
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TC39x BC/BD-Step  
Electrical SpecificationFlash Target Parameters  
Table 3-75 Flash (cont’d)  
Parameter  
Symbol  
Values  
Typ.  
Unit  
Note / Test Condition  
Min.  
Max.  
2000000 cycles  
Number of erase operations on NERD1C CC  
DF1 over lifetime (complement  
sensing mode) 6)  
-
-
-
-
-
Number of erase operations on NERD1S CC  
DF1 over lifetime (single ended  
sensing mode) 7)  
-
-
-
500000  
500000  
125000  
cycles  
Data Flash Endurance per  
EEPROMx sector (complement CC  
sensing mode) 8)  
NE_EEP10C  
cycles Max. data retention  
time 10 years  
DataFlash Endurance per  
EEPROMx sector (single ended CC  
sensing mode) 8)  
NE_EEP10S  
cycles Retention time and Tj  
according below  
example temperature  
profile  
-
-
-
-
-
125000  
125000  
250000  
cycles max data retention time  
20y, Tj=110°C  
cycles max data retention time  
8.2y, Tj=125°C  
Data Flash Endurance per  
HSMx sector (complement  
sensing mode) 8)  
N
N
E_HSMC CC -  
cycles Max. data retention  
time 10 years  
Data Flash Endurance per  
HSMx sector (single ended  
sensing mode) 8)  
E_HSMS CC -  
-
125000  
cycles Retention time and Tj  
according below  
example temperature  
profile  
-
-
-
-
-
125000  
125000  
150  
cycles max data retention time  
20y, Tj=110°C  
cycles max data retention time  
8.2y, Tj=125°C  
Junction temperature limit for  
PFlash program/erase  
operations  
T
JPFlash SR  
-
°C  
Data Flash Erase Time per  
Sector 1)3)5)  
t
t
ERD1 CC  
ERDM CC  
-
-
-
-
0.5  
1.5  
s
s
Max. 1000  
erase/program cycles  
Data Flash Erase Time per  
Max allowed cycles,  
see NE_EEP10 and  
NE_HSM parameters  
1)3)5)  
Sector  
DataFlash Adder on Erase Time tER_ADDC32C  
-
-
50  
ms  
Adder per 32 kByte on  
erase time; applicable  
only when using  
per 32kByte erase size when  
using complement sensing  
mode 1)  
CC  
complement mode  
Data Sheet  
512  
V 1.2, 2021-03  
OPEN MARKET VERSION  
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