TC39x BC/BD-Step
Electrical SpecificationPower Supply Infrastructure and Supply Start-up
3.13.1.2 Single Supply mode (e)
0
1
2
3
4
5
VEXT/VDDP3
(externally supplied)
LVD Reset release
HWCFG[1,2] latch
3.63 V
3.30 V
VRST5/
VRST33 Primary cold PORST Reset Threshold
VLVDRST5
LVD Reset Threshold
VDDPPA
HWCFG[6] latch
0 V
PORST output deasserted when VDD,
VDDP3 and VEXT voltage above
respective primary reset thresholds
PORST (output driven by PMS)
PORST (input driven by external regulator)
PORST input deasserted by external
regulator when all input voltages have
reached their minimum operational level
VDD (internally generated
by EVRC)
1.375 V
1.25 V
VRSTC
Primary Reset Threshold
tEVRstartup
(incl. tSTR)
EVRC is started with a delay after
VLVDRST5 level is reached at VEXT &
VLVDRSTC level is reached at VDDPD
EVRC_tSTR
0 V
tBP (incl. tEVRstartup)
T3
T0
T2
T4
User Code Execution
fCPU0=100MHz default
T5
T1
EVRC Ramp-up
Phase
Basic Supply & Clock
Infrastructure
Firmware Execution
Power Ramp-down phase
Startup_Diag_4 v 0
on firmware exit
Figure 3-4 Single Supply mode (e) - (VEXT & VDDP3) 3.3 V single supply
VEXT = VDDP3 = 3.3 V single supply mode. VDD is generated internally by the EVRC regulator.
•
The rate at which current is drawn from the external regulator (dIEXT /dt) is limited in the Start-up phase to a
maximum of 100 mA with 100 us settling time. Start-up slew rates for supply rails shall comply to datasheet
parameter SR. The slope is defined as the maximal tangential slope between 0% to 100% voltage level. Actual
waveform may not represent the specification.
•
•
PORST is active/asserted when either PORST (input) or PORST (output) is active/asserted.
PORST (input) active means that the reset is held active by external agents by pulling the PORST pin low. It
is recommended to keep the PORST (input) asserted until the external supply is above the respective primary
reset threshold.
•
PORST (output) active means that µC asserts the reset internally and drives the PORST pin low thus
propagating the reset to external devices. The PORST (output) is asserted by the µC when at least one among
the three supply domains (VDD, VDDP3 or VEXT) violate their primary under-voltage reset thresholds.The
PORST (output) is de-asserted by the µC when all supplies are above their primary reset thresholds and the
Data Sheet
456
V 1.2, 2021-03
OPEN MARKET VERSION
INFINEON [ Infineon ]
