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SAK-C167CR-LM 参数 Datasheet PDF下载

SAK-C167CR-LM图片预览
型号: SAK-C167CR-LM
PDF下载: 下载PDF文件 查看货源
内容描述: 16位单芯片微控制器 [16-Bit Single-Chip Microcontroller]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 74 页 / 954 K
品牌: INFINEON [ Infineon ]
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C167CR  
C167SR  
Capture/Compare (CAPCOM) Units  
The CAPCOM units support generation and control of timing sequences on up to  
32 channels with a maximum resolution of 16 TCL. The CAPCOM units are typically  
used to handle high speed I/O tasks such as pulse and waveform generation, pulse  
width modulation (PMW), Digital to Analog (D/A) conversion, software timing, or time  
recording relative to external events.  
Four 16-bit timers (T0/T1, T7/T8) with reload registers provide two independent time  
bases for the capture/compare register array.  
The input clock for the timers is programmable to several prescaled values of the internal  
system clock, or may be derived from an overflow/underflow of timer T6 in module GPT2.  
This provides a wide range of variation for the timer period and resolution and allows  
precise adjustments to the application specific requirements. In addition, external count  
inputs for CAPCOM timers T0 and T7 allow event scheduling for the capture/compare  
registers relative to external events.  
Both of the two capture/compare register arrays contain 16 dual purpose capture/  
compare registers, each of which may be individually allocated to either CAPCOM timer  
T0 or T1 (T7 or T8, respectively), and programmed for capture or compare function.  
Each register has one port pin associated with it which serves as an input pin for  
triggering the capture function, or as an output pin (except for CC24 CC27) to indicate  
the occurrence of a compare event.  
When a capture/compare register has been selected for capture mode, the current  
contents of the allocated timer will be latched (captured) into the capture/compare  
register in response to an external event at the port pin which is associated with this  
register. In addition, a specific interrupt request for this capture/compare register is  
generated. Either a positive, a negative, or both a positive and a negative external signal  
transition at the pin can be selected as the triggering event. The contents of all registers  
which have been selected for one of the five compare modes are continuously compared  
with the contents of the allocated timers. When a match occurs between the timer value  
and the value in a capture/compare register, specific actions will be taken based on the  
selected compare mode.  
Data Sheet  
22  
V3.2, 2001-07  
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