C167CR
C167SR
T2EUD
fCPU
T2IN
U/D
Interrupt
Request
2n : 1
GPT1 Timer T2
T2
Mode
Control
Reload
Capture
Interrupt
Request
fCPU
2n : 1
Toggle FF
T3OTL
T3
Mode
Control
T3IN
GPT1 Timer T3
T3OUT
U/D
T3EUD
Other
Timers
Capture
Reload
T4IN
T4
Mode
Control
Interrupt
Request
2n : 1
GPT1 Timer T4
U/D
fCPU
T4EUD
MCT02141
n = 3 … 10
Figure 6
Block Diagram of GPT1
With its maximum resolution of 8 TCL, the GPT2 module provides precise event control
and time measurement. It includes two timers (T5, T6) and a capture/reload register
(CAPREL). Both timers can be clocked with an input clock which is derived from the CPU
clock via a programmable prescaler or with external signals. The count direction (up/
down) for each timer is programmable by software or may additionally be altered
dynamically by an external signal on a port pin (TxEUD). Concatenation of the timers is
supported via the output toggle latch (T6OTL) of timer T6, which changes its state on
each timer overflow/underflow.
The state of this latch may be used to clock timer T5, and/or it may be output on pin
T6OUT. The overflows/underflows of timer T6 can additionally be used to clock the
CAPCOM timers T0 or T1, and to cause a reload from the CAPREL register. The
CAPREL register may capture the contents of timer T5 based on an external signal
transition on the corresponding port pin (CAPIN), and timer T5 may optionally be cleared
after the capture procedure. This allows the C167CR to measure absolute time
differences or to perform pulse multiplication without software overhead.
Data Sheet
26
V3.2, 2001-07
INFINEON [ Infineon ]
