S29GL01GP
S29GL512P
S29GL256P
S29GL128P
Figure 11.5 Read Operation Timings
tRC
Addresses Stable
tACC
Addresses
CE#
tCEH
tRH
tRH
tDF
tOE
OE#
tOEH
WE#
tCE
tOH
Output Valid
HIGH Z
HIGH Z
Outputs
RESET#
RY/BY#
0 V
Note
For Figure 11.5, parameters tCEH and tOEH are specific to a read cycle following a flash write operation.
Figure 11.6 Page Read Timings
Same Page
Amax
:
:
A3
A0
A2
Ad
Aa
Ab
tPACC
Ac
(See Note)
tPACC
tPACC
tACC
Data Bus
Qa
Qb
Qc
Qd
CE#
OE#
Note
Figure 11.6 shows word mode. Addresses are A2:A-1 for byte mode.
Document Number: 002-00886 Rev. *B
Page 53 of 83
INFINEON [ Infineon ]
