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ICE3BR0665JF 参数 Datasheet PDF下载

ICE3BR0665JF图片预览
型号: ICE3BR0665JF
PDF下载: 下载PDF文件 查看货源
内容描述: 离线式开关电源电流模式控制器,集成650V [Off-Line SMPS Current Mode Controller with integrated 650V]
分类和应用: 开关控制器
文件页数/大小: 36 页 / 1631 K
品牌: INFINEON [ Infineon ]
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CoolSET®-F3R  
ICE3BR0665JF  
Functional Description  
Within the soft start period, the duty cycle is increasing  
from zero to maximum gradually (see Figure 12).  
3.5  
PWM Section  
In addition to Start-Up, Soft-Start is also activated at  
0.75  
PWM Section  
each restart attempt during Auto Restart.  
Oscillator  
VSoftS  
Duty Cycle  
max  
tSoft-Start  
VSOFTS32  
Clock  
Frequency  
Jitter  
VFB  
t
t
Soft Start  
Block  
4.5V  
FF1  
Q
Gate Driver  
&
S
R
Soft Start  
1
Comparator  
G8  
PWM  
Comparator  
G9  
VOUT  
VOUT  
Current  
Limiting  
CoolMOS®  
Gate  
tstart-Up  
t
Figure 14  
PWM Section Block  
Figure 13 Start Up Phase  
3.5.1  
Oscillator  
The Start-Up time tStart-Up before the converter output  
voltage VOUT is settled, must be shorter than the Soft-  
Start Phase tSoft-Start (see Figure 13).  
By means of Soft-Start there is an effective  
minimization of current and voltage stresses on the  
integrated CoolMOS®, the clamp circuit and the output  
overshoot and it helps to prevent saturation of the  
transformer during Start-Up.  
The oscillator generates a fixed frequency of 67KHz  
with frequency jittering of ±4% (which is ±2.7KHz) at a  
jittering period of 4ms.  
A capacitor, a current source and current sink which  
determine the frequency are integrated. The charging  
and discharging current of the implemented oscillator  
capacitor are internally trimmed, in order to achieve a  
very accurate switching frequency. The ratio of  
controlled charge to discharge current is adjusted to  
reach a maximum duty cycle limitation of Dmax=0.75.  
Once the Soft Start period is over and when the IC goes  
into normal operating mode, the switching frequency of  
the clock is varied by the control signal from the Soft  
Start block. Then the switching frequency is varied in  
range of 67KHz ± 2.7KHz at period of 4ms.  
3.5.2  
PWM-Latch FF1  
The output of the oscillator block provides continuous  
pulse to the PWM-Latch which turns on/off the internal  
CoolMOS®. After the PWM-Latch is set, it is reset by  
the PWM comparator, the Soft Start comparator or the  
Current -Limit comparator. When it is in reset mode, the  
output of the driver is shut down immediately.  
Version 2.0  
12  
11 Sep 2008  
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