AN985B/BX
Registers and Descriptors Description
Field
PMES
Bits
15
Type
ro
Description
PME_Status
This bit is set when the AN985B/BX would normally assert the PME#
signal for wake-up event, this bit is independent of the state of the PME-
En bit. Writing a “1” to this bit will clear it and cause the AN985B/BX to
stop asserting a PME# (if enabled). Writing a “0” has no effect. Since the
AN985B/BX doesn’t supports PME# from D3cold, this bit is defaulted to
“0”.
DSCAL
DSEL
14:13
12:9
8
ro
ro
ro
Data_Scale
Indicates the scaling factor to be used when interpreting the value of the
Data register. This field is required for any function that implements the
Data register. Otherwise, it’s optional.The AN985B/BX doesn’t support
Data register and Data_Scale.
Data_Select
This four bit field is used to select which data is to be reported through the
Data register and Data_Scale field. This field is required for any function
that implements the Data register. The AN985B/BX doesn’t support
Data_Select.
PME_En
PME_En
“1” enables the AN985B/BX to assert PME#. When “0” disables the
PME# assertion.This bit defaults to “0” if the function does not support
PME# generation from D3cold.
Res
PWRS
7:2
1:0
ro
ro
Reserved
PowerState
This two bit field is used both to determine the current power state of the
AN985B/BX and to set the AN985B/BX into a new power state. The
definition of this field is given below.
00B - D0
01B - D1
10B - D2
11B - D3hot
If software attempts to write an unsupported, optional state to this field,
the write operation must complete normally on the bus, however the data
is discarded a no state change occurs.
Data Sheet
71
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
