AN985B/BX
Registers and Descriptors Description
Field
Bits
Type
Description
GPTT
11
ro/lh
General Purpose Timer Time-out
Base on CSR11 timer register.
Note:LH = High Latching and cleared by writing 1
Res
RWT
10
9
ro
ro/lh
Reserved
Receive Watchdog Time-out
Based on CSR15 watchdog timer register.
Note:LH = High Latching and cleared by writing 1
RPS
RDU
8
7
ro/lh
ro/lh
Receive Process Stopped
Receive state = stop
Note:LH = High Latching and cleared by writing 1
Receive Descriptor Unavailable
Note:LH = High Latching and cleared by writing 1
1B
, while the next receive descriptor can’t be applied by AN985B/BX.
The receive process is suspended in this situation. To restart the
receive process the ownership bit of next receive descriptor should
be set to AN985B/BX and a receive poll demand command should
be issued (or a new recognized frame is received, if the receive poll
demand is not issued).
RCI
6
5
ro/lh
ro/lh
Receive Completed Interrupt
Note:LH = High Latching and cleared by writing 1
1B
, while a frame reception is completed
TUF
Transmit Under-Flow
Note:LH = High Latching and cleared by writing 1
1B
, while the transmit FIFO had an under-flow condition happened
during transmitting. The transmit process will enter the suspended
state and report the under-flow error on bit1 of TDES0
Res
TJT
4
3
ro
ro/lh
Reserved
Transmit Jabber Timer Time-out
Note:LH = High Latching and cleared by writing 1
1B
, while the transmit jabber timer expired. The transmit processor
will enter the stop state and the transmit jabber time-out flag of bit
14 of TDES0 will be asserted
TDU
2
1
ro/lh
ro/lh
Transmit Descriptor Unavailable
Note:LH = High Latching and cleared by writing 1
1B
, while the next transmit descriptor can’t be applied by AN985B/BX.
The transmission process is suspended in this situation. To restart
the transmission process the ownership bit of next transmit
descriptor should be set to AN985B/BX and if the transmit
automatic polling is not enabled then a transmit poll demand
command should be issued.
TPS
Transmit Process Stopped
Note:LH = High Latching and cleared by writing 1
1B
, while transmit state = stop
Data Sheet
55
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
