AN985B/BX
Registers and Descriptors Description
Offset
0ch
b31------------------------------------------------b16 b15------------------------------------------------------------b0
------
------
Latency timer Cache line size
10h
Base I/O address
14h
Base memory address
18h~24h Reserved
28h
2ch
30h
34h
38h
3ch
40h
80h
c0h
c4h
ROM-im*
Subsystem ID*
Boot ROM base address
Reserved
Reserved
Max_Lat*
Reserved
Signature of AN985B/BX
PMC
Reserved
Address space offset*
Add-indi*
Subsystem vendor ID*
Min_Gnt*
Interrupt pin
Interrupt line
Driver Space Reserved
Next_Item_Ptr Cap_ID
PMCSR
Note:Automatically recalled from EEPROM when CARDBUS reset is deserted.
1. CIS(28H) is a read-only register.
2. DS(40H), bit 15-8, is read/write able register.
3. SIG(80H) is hard wired register, read only.
Loaded Identification Number of Device and Vendor
LID_CR0
Offset
00H
Reset Value
From EEPROMH
Loaded Identification Number of Device and
Vendor
ꢀꢁ ꢀꢂ ꢃꢄ ꢃꢅ ꢃꢆ ꢃꢇ ꢃꢈ ꢃꢉ ꢃꢀ ꢃꢃ ꢃꢁ ꢃꢂ ꢁꢄ ꢁꢅ ꢁꢆ ꢁꢇ ꢁꢈ ꢁꢉ ꢁꢀ ꢁꢃ ꢁꢁ ꢁꢂ ꢄ
ꢅ ꢆ ꢇ ꢈ ꢉ ꢀ ꢃ ꢁ ꢂ
/','
/9,'
UR
UR
Field
Bits
Type
Description
LDID
31:16
ro
Loaded Device ID
The device ID number loaded from serial EEPROM.
LVID
15:0
ro
Loaded Vendor ID
The vendor ID number loaded from serial EEPROM.
Reset Value loaded from EEPROM
Configuration Command and Status
Data Sheet
36
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
