AN985B/BX
Registers and Descriptors Description
8.1
AN985B/BX Configuration Registers
Table 6
Registers Address Space
Module
Configuration
Base Address
0000 0000H
End Address
0000 00C4H
Note
Xxxxx
Table 7
Registers Overview
Register Short Name
LID_CR0
Register Long Name
Loaded Identification Number of Device and
Vendor
Offset Address Page Number
00H
36
CSD_CR1
CC_CR2
LT_CR3
Configuration Command and Status
Class Code and Revision Number
Latency Timer
I/O Base Address
Memory Base Address
Card Information Structure
Subsystem ID and Vendor ID
Boot ROM Base Address
Capabilities Pointer
Configuration Interrupt
Driver Space for Special Purpose
Signature
04H
08H
0CH
10H
14H
28H
2CH
30H
34H
3CH
40H
80H
C0H
C4H
36
38
38
39
40
40
41
41
41
42
43
43
44
46
IOBA_CR4
MBA_CR5
CIS_CR10
SID_CR11
BRBA_CR12
CP_CR13
CI_CR15
DS_CR16
SIG_CR32
PMR0_CR48
PMR1_CR49
Power Management Register 0
Power Management Register 1
The register is addressed wordwise.
Table 8
Registers Access ConditionsRegisters Access Conditions
Access Condition Short Name
Dependency
= B.
Standard abbreviations:
Table 9
Mode
Registers Access Types
Symbol Description Hardware (HW)
Description Software (SW)
read/write
rw
Register is used as input for the HW
Register is read and writable by SW
read
r
Register is written by HW (register
Value written by software is ignored by
between input and output -> one cycle hardware; that is, software may write any
delay)
value to this field without affecting hardware
behavior (= Target for development.)
write
w
Register is writable by SW
read/write
hardware
affected
rwh
Register can be modified by HW
Register can be modified by HW, but the
priority SW versus HW has to be specified
Data Sheet
34
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
