IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
72-BIT FIFO
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
tRS
MRS
REN
t
RSR
RSR
t
RSS
RSS
t
t
WEN
tRSS
tRSR
FWFT/SI
tRSS
tRSR
LD
t
RSS
RSS
FSEL0,
FSEL1
t
OW,
IW, BM
t
t
t
HRSS
WHSTL
RHSTL
HRSS
HRSS
SHSTL
BE
t
RSS
RSS
RSS
t
t
PFM
IP
RT
t
RSS
RSS
t
SEN
t
RSF
If FWFT = HIGH, OR = HIGH
If FWFT = LOW, EF = LOW
EF/OR
t
RSF
If FWFT = LOW, FF = HIGH
If FWFT = HIGH, IR = LOW
FF/IR
PAE
t
t
RSF
RSF
PAF, HF
t
RSF
OE = HIGH
OE = LOW
(1)
Q0
- Qn
5994 drw14
NOTE:
1. During Master Reset the High-Impedance control of the Qn data outputs is provided by OE only, RCS can be HIGH or LOW until the first rising edge of RCLK after Master Reset
is complete.
Figure 9. Master Reset Timing
32
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
