IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
72-BIT FIFO
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
ECHO READ CLOCK (ERCLK)
ECHO READ ENABLE (EREN)
TheEchoReadClockoutputisprovidedinbothHSTLandLVTTLmode,
selectableviaRHSTL.TheERCLKisafree-runningclockoutput,itwillalways
follow the RCLK input regardless of REN and RCS.
TheEchoReadEnableoutputisprovidedinbothHSTLandLVTTLmode,
selectableviaRHSTL.
The EREN output is provided to be used in conjunction with the ERCLK
outputandprovidesthereadingdevicewithamoreeffectiveschemeforreading
datafromtheQnoutputportathighspeeds.TheERENoutputiscontrolledby
internallogicthatbehavesasfollows:TheERENoutputisactiveLOWforthe
RCLKcycle thata newwordis readoutofthe FIFO. Thatis, a risingedge of
RCLKwillcauseERENtogoactive,LOWifbothRENandRCSareactive,LOW
and the FIFO is NOT empty.
TheERCLKoutputfollowstheRCLKinputwithanassociateddelay. This
delayprovidestheuserwithamoreeffectivereadclocksourcewhenreading
data from the Qn outputs. This is especially helpful at high speeds when
variableswithinthedevicemaycausechangesinthedataaccesstimes. These
variations in access time maybe caused by ambient temperature, supply
voltage,devicecharacteristics.TheERCLKoutputalsocompensatesforany
tracelengthdelaysbetweentheQndataoutputsandreceivingdevicesinputs.
Anyvariationseffectingthedataaccesstimewillalsohaveacorresponding
effectontheERCLKoutputproducedbytheFIFOdevice,thereforetheERCLK
outputleveltransitionsshouldalwaysbeatthesamepositionintimerelativeto
thedataoutputs.Note,thatERCLKisguaranteedbydesigntobeslowerthan
the slowest Qn, data output. Refer to Figure 4, Echo Read Clock and Data
OutputRelationship,Figure28,EchoReadClock&ReadEnableOperation
and Figure 29, Echo RCLK & Echo RENOperation for timing information.
SERIAL CLOCK (SCLK)
Duringserialloadingoftheprogrammingflagoffsetregisters,arisingedge
ontheSCLKinputisusedtoloadserialdatapresentontheSIinputprovided
thattheSENinputisLOW.
DATAOUTPUTS(Q0-Qn)
(Q0-Q71)aredataoutputsfor72-bitwidedata,(Q0-Q35)aredataoutputs
for 36-bit wide data or (Q0-Q17) are data outputs for 18-bit wide data.
RCLK
tERCLK
tERCLK
ERCLK
tD
tA
Q
SLOWEST(3)
5994 drw08
NOTES:
1. REN is LOW.
2. tERCLK > tA, guaranteed by design.
3. Qslowest is the data output with the slowest access time, tA.
4. Time, tD is greater than zero, guaranteed by design.
Figure 4. Echo Read Clock and Data Output Relationship
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IDT [ INTEGRATED DEVICE TECHNOLOGY ]
