IDT70V5388/78
3.3V 64/32K x 18 Synchronous FourPort™ Static RAM
Industrial and Commercial Temperature Ranges
JTAGTimingSpecifications
tTCYC
tTL
t
TH
TCK
Device Inputs(1)/
TDI/TMS
t
JDC
t
JH
tJS
Device Outputs(2)/
TDO
t
JRSR
t
JCD
TRST
5649 drw 26
,
t
JRST
NOTES:
1. Device inputs = All device inputs except TDI, TMS, and TRST.
2. Device outputs = All device outputs except TDO.
3. To reset the test (JTAG) port without resetting the device, TMS must be held LOW for 5 cycles, or TRST must be held LOW for one cycle.
27
6.42