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IDT7027S25PF 参数 Datasheet PDF下载

IDT7027S25PF图片预览
型号: IDT7027S25PF
PDF下载: 下载PDF文件 查看货源
内容描述: 高速32K ×16的双端口静态RAM [HIGH-SPEED 32K x 16 DUAL-PORT STATIC RAM]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 19 页 / 161 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT7027S/L  
High-Speed 32K x 16 Dual-Port Static RAM  
Military, Industrial and Commercial Temperature Ranges  
Waveform of Read Cycles(5)  
tRC  
ADDR  
(4)  
tAA  
(4)  
tACE  
CE(6)  
(4)  
tAOE  
OE  
(4)  
tABE  
UB, LB  
R/W  
tOH  
(1)  
tLZ  
VALID DATA(4)  
DATAOUT  
(2)  
tHZ  
BUSYOUT  
(3,4)  
3199 drw 05  
tBDD  
Timing of Power-Up Power-Down  
CE(6)  
tPU  
tPD  
CC  
I
50%  
50%  
ISB  
.
3199 drw 06  
NOTES:  
1. Timing depends on which signal is asserted last, CE, OE, LB, or UB.  
2. Timing depends on which signal is de-asserted first CE, OE, LB, or UB.  
3. tBDD delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations BUSY  
has no relation to valid output data.  
4. Start of valid data depends on which timing becomes effective last tAOE, tACE, tAA or tBDD.  
5. SEM = VIH.  
6. Refer to Chip Enable Truth Table.  
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