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ICS1531 参数 Datasheet PDF下载

ICS1531图片预览
型号: ICS1531
PDF下载: 下载PDF文件 查看货源
内容描述: 888位MSPS A / D转换器与行同步时钟发生器 [Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator]
分类和应用: 转换器时钟发生器
文件页数/大小: 76 页 / 525 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1531 Data Sheet - Preliminary  
Chapter 6 Register Set  
6.5.22 Register 25h: PNLCLK-OE  
The PNLCLK-OE (PNLCLK Output Enable) Register is used to enable the PNLCLK output and  
spread-spectrum functionality. (To select values, see Section 7.3, “Programming Spread Spectrum”.)  
Table 6-22. PNLCLK-OE Register  
Bit  
Bit Name  
Bit Definition  
Ac- Spec.  
cess Func.  
Re-  
set  
ResSeerveeSde.ction 6.1, “Reserved Bits”.  
These bits can be programmed to ‘0’.  
25:7- Reserved  
25:3  
0
25:2  
CLK_SEL  
Clock Selection.  
R/W  
0
This0b=itFsreelqeuctesntchyeininppuuttistofrtohme PaNcLryCsLtaKl.phase-lock loop.  
1 = Frequency input is from ADC_CLK, divided by 16.  
PNL0C=LDKisSapbrleeaPdN-SLpCeLcKtrsupmreEadn-asbpleec.trum functionality.  
25:1  
25:0  
PNLCLK_SSENB  
PNLCLK_OE  
R/W  
R/W  
0
0
1 = Enable PNLCLK spread-spectrum functionality.  
PNL0C=LDKisOaubtlepuPtNELnCaLbKleo.utput.  
1 = Enable PNLCLK output.  
ICS1531 Rev N 12/1/99  
December, 1999  
Copyright © 1999, Integrated Circuit Systems, Inc.  
All rights reserved.  
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