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ICS1531 参数 Datasheet PDF下载

ICS1531图片预览
型号: ICS1531
PDF下载: 下载PDF文件 查看货源
内容描述: 888位MSPS A / D转换器与行同步时钟发生器 [Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator]
分类和应用: 转换器时钟发生器
文件页数/大小: 76 页 / 525 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1531 Data Sheet - Preliminary  
Chapter 6 Register Set  
6.5.13 Register 10h: Chip Ver  
The Chip Ver (Chip Version) Register is used to read the version number of the ICS1531.  
Table 6-14. Chip Ver Register  
Bit  
Bit Name  
Bit Definition  
Ac- Spec. Re-  
cess Func.  
set  
ChiTphViserrseigoisnte[7r -in0d].icates the version number of the ICS chip.  
For the ICS1531, these bits have a value of 31 decimal  
(that is, 1F hex), as in 1531.  
10:7- Chip Ver [7-0]  
10:0  
Read  
1F  
6.5.14 Register 11h: Chip Rev  
The Chip Rev (Chip Revision) Register is used to read the revision level of the ICS1531 chip.  
Table 6-15. Chip Rev Register  
Bit  
Bit Name  
Bit Definition  
Ac- Spec. Re-  
cess Func.  
set  
11:7- Chip Major Rev  
11:4 [3-0]  
Chip Major Revision [3-0].  
Read  
IN-A  
00+  
TheInvdailcuaeteofathICesSe15b3it1s:major revision.  
Increment (+) with each all-layer revision.  
Have an initial (reset) value of 00h.  
11:3- Chip Minor Rev  
11:0 [3-0]  
Chip Minor Revision [3-0].  
Read  
IN-A  
01+  
TheInvdailcuaeteofathICesSe15b3it1s:minor revision.  
Increment (+) with each all-layer revision.  
Have an initial (reset) value of 01h.  
ICS1531 Rev N 12/1/99  
December, 1999  
Copyright © 1999, Integrated Circuit Systems, Inc.  
All rights reserved.  
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