ICS1531 Data Sheet - Preliminary
Chapter 6 Register Set
Table 6-2. Register Set Outline (Continued)
Register Register Name
Index
Register
Access
Bit #
Bit Name
Brief Description
Reset
Value
3Ah
B_COMP_OFF R/W
7-4 B_C_O_B
3-0 B_C_O_A
Select blue comparator offset, ‘B’ channel
Select blue comparator offset, ‘A’ channel
7
7
3Bh
CAL_1
CAL_2
R/W
7
6
Reserved
ADC_DD
Reserved
0
0
5
5
Select delay for all RGB data from ADC (LSB, bit 0)
Select clock delay for green channel
Select clock delay for red channel
5-3 G_CD
2-0 R_CD
3Ch
R/W
7-5 Bandgap_CAL
4-3 ADC_DD
2-0 B_CD
Calibrate bandgap voltage
Select delay for all RGB data from ADC (MSB bits 2-1)
Select clock delay for blue channel
5
0
5
ICS1531 Rev N 12/1/99
December, 1999
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
27
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
