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ICS1531 参数 Datasheet PDF下载

ICS1531图片预览
型号: ICS1531
PDF下载: 下载PDF文件 查看货源
内容描述: 888位MSPS A / D转换器与行同步时钟发生器 [Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator]
分类和应用: 转换器时钟发生器
文件页数/大小: 76 页 / 525 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1531 Data Sheet - Preliminary  
Chapter 6 Register Set  
Table 6-2. Register Set Outline (Continued)  
Register Register Name  
Index  
Register  
Access  
Bit #  
Bit Name  
Brief Description  
Reset  
Value  
10h  
Chip Ver  
Read  
7-0 Chip Ver  
Read chip version 31 decimal (1F hex) as in 1531  
1F  
11h  
Chip Rev  
Read. IN-A.  
Read  
7-4 Chip Major Rev  
3-0 Chip Minor Rev  
Read initial value 00h.  
+Value increments with chip revision.  
Read initial value 01h.  
00+  
01+  
+Value increments with chip revision.  
12h  
Rd_Reg  
7-4 Reserved  
Reserved  
N/A  
N/A  
N/A  
N/A  
N/A  
3
2
1
0
PNLCLK_Lock  
MCLK_Lock  
Pixel PLL_Lock  
DPA_Lock  
Read PNLCLK lock status  
Read MCLK lock status  
Read pixel PLL lock status  
Read DPA lock status  
13h-1Fh Reserved  
N/A  
0
20h  
21h  
22h  
PNLCLK-M  
PNLCLK-N  
R/W. D-PK.  
R/W. D-PK.  
7-0 PNLCLK_M  
7-0 PNLCLK_N  
7-0 PNLCLK_SS0  
Select value for PNLCLK M Reference Divider  
Select value for PNLCLK N Feedback Divider  
0
PNLCLK-SS0 R/W. D-PK.  
PNLCLK-SS1 R/W. D-PK.  
Select value for PNLCLK spread-spectrum counter  
LSBs bits 7-0  
0
23h  
24h  
7-4 Reserved  
3-0 PNLCLK_SS1  
Reserved  
0
0
Select value for PNLCLK spread-spectrum counter  
MSBs bits 11-8  
PNLCLK-SSOE R/W. D-PK.  
7-6 PNLCLK_SS  
Select PNLCLK spread-spectrum gain  
Reserved  
Select PNLCLK Phase/Frequency Detector gain  
Select value for PNLCLK Output Scaler Divider  
0
0
0
0
5
Reserved  
4-2 PNLCLK_PFD  
1-0 PNLCLK_OSD  
25h  
PNLCLK-OE  
R/W  
7-3 Reserved  
Reserved  
Select input for PNLCLK PLL  
0
0
0
0
2
1
0
CLK_SEL  
PNLCLK_SSENB Enable PNLCLK spread-spectrum  
PNLCLK_OE  
Enable PNLCLK output  
26h  
27h  
28h  
29h  
MCLK-M  
R/W. D-MK.  
R/W. D-MK.  
R/W. D-MK.  
R/W. D-MK.  
7-0 MCLK_M  
7-0 MCLK_N  
7-0 MCLK_SS0  
Select value for MCLK M Reference Divider  
Select value for MCLK N Feedback Divider  
Select MCLK spread-spectrum counter LSBs bits 7-0  
0
0
0
MCLK-N  
MCLK-SS0  
MCLK-SS1  
7-4 Reserved  
3-0 MCLK_SS1  
Reserved  
0
0
Select MCLK spread-spectrum counter MSBs bits 11-8  
2Ah  
2Bh  
MCLK-SSOE  
MCLK-OE  
R/W. D-MK.  
7-6 MCLK_SS  
Select MCLK spread-spectrum gain  
Reserved  
Select MCLK Phase/Frequency Detector gain  
Select value for MCLK Output Scaler Divider  
0
0
0
0
5
Reserved  
4-2 MCLK_PFD  
1-0 MCLK_OSD  
R/W  
7-2 Reserved  
Reserved  
Enable MCLK spread-spectrum  
Enable MCLK output  
0
0
0
1
0
MCLK_SSENB  
MCLK_OE  
ICS1531 Rev N 12/1/99  
December, 1999  
Copyright © 1999, Integrated Circuit Systems, Inc.  
All rights reserved.  
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