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IC-MNEVALMN1D 参数 Datasheet PDF下载

IC-MNEVALMN1D图片预览
型号: IC-MNEVALMN1D
PDF下载: 下载PDF文件 查看货源
内容描述: 25位游标编码器, 3 -CH 。采样13位仙/ D插值 [25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION]
分类和应用: 编码器
文件页数/大小: 59 页 / 1705 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-MN 25-BIT NONIUS ENCODER  
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION  
Rev D1, Page 39/59  
Output Data Length  
The code direction of the output data word can be al-  
The output bit count is derived from the parameters tered using pin DIR or register DIR. Both signals are  
DL_ST, M2S and DL_MT. In accordance with the se- EXOR-gated and together comprise the internal direc-  
lected protocol two additional bits for the error and tion of rotation signal.  
warning messages are always transmitted.  
DIR  
Code  
0
Addr. 0x3D; bit 6  
The output bit length for singleturn data can be set in-  
dependent of the internal converter resolution. For bit  
lengths which exceed the internal word length the data  
following the LSB is zero filled. If enabled by M2S mul-  
titurn data is always transmitted before singleturn data.  
Direction of rotation  
Not inverted  
Inverted  
1
Table 62: Inversion of code direction  
DL_ST  
Code  
0x00  
...  
Addr. 0x3E; bit 4:0  
Bit count  
For reasons of data security iC-MN provides fixed CRC  
polynomials (see Table 63). The CRC start value can  
be freely selected, thus enabling a PLC to clearly allo-  
cate data to the source (for safety applications). Reg-  
ister communication can be optionally blocked by pa-  
rameter NC_BiSS.  
8 bit +2 bit for E/W  
...  
0x05  
...  
13 bit +2 bit for E/W  
...  
0x11  
25 bit +2 bit for E/W  
Bit counts listed below are valid only for multiturn  
synchronization mode (see P. 30)  
Data  
Channel  
CRC  
HEX Code  
Polynomial  
Calculation  
Start Value  
0x12  
...  
26 bit +2 bit for E/W  
...  
SCD  
0x43  
x6+x1+x0  
x4+x1+x0  
see CID_SCD  
0x0  
CDM, CDS 0x13  
0x19  
0x1A  
33 bit +2 bit for E/W  
39 bit +2 bit for E/W  
Table 63: BiSS CRC polynomials  
Table 59: ST Data length  
CID_SCD  
Code  
0x00  
Addr. 0x4C; bit 7:4  
CRC start value SCD  
M2S  
Code  
00  
Addr. 0x3F; bit 2:1  
Function  
. . .  
CID_SCD  
No output  
0x0F  
01  
MT data output of lowest 4 bits  
MT data output of lowest 8 bits  
Complete output, MT bit count following DL_MT  
10  
Table 64: CRC start value for SCD  
11  
NC_BISS  
Addr. 0x43; bit 2  
Function  
Table 60: MT Data output  
Code  
0
1
BiSS C register communication enabled  
Output Options  
Communication disable  
(no execution of commands, no access to RAM or  
EEPROM  
The Gray or binary code format option covers the sin-  
glecycle word in its entirety (MT and ST data); only  
filled in zeros and the error and warning bits remain  
unaltered.  
Notes  
If the device setup and a set communication disable  
NC_BiSS are to be stored to the EEPROM, the  
preset function can be triggered at pin PRES.  
GRAY_SCD  
Addr. 0x3F; bit 7  
Data format  
Table 65: Communication disable  
Code  
0
1
Binary coded  
Gray coded  
Table 61: Data format (covers MT and ST data)  
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