iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 42/59
COMMAND and STATUS REGISTERS
Execution Of Internal Commands
command can be used for SSI encoders to later enable
The command register at address 0x77 can be ac- parameterization, for example.
cessed fully independent of the internal state of op-
eration. Depending on the data value written to this Execution Of Protocol Commands
register the execution of an implemented command is iC-MN supports selected BiSS C protocol commands:
triggered.
CMD
Selected address
(IDS > 0x00)
Broadcast address
(IDS = 0x00)
MN_CMD
Code
Addr. 0x77; bit 2:0
Command
W
10
11
Execute SOFT_PRES
Execute CRC_CHECK
-
-
Description
0x0
SOFT_RES
Soft reset
(new startup using
internal config. data)
Table 71: Implemented protocol commands
0x1
WRITE_CONF
Transfers internal config.
data to the EEPROM
Automatic Reset Function
0x2
0x3
SOFT_PRES
CRC_CHECK
Calls preset routine
AUTORES can be used to set whether the command
SOFT_RES is automatically generated or not if the er-
ror AM_MIN occurs.
CRC verification of the
internal config. data
0x4
TOG_BISS
No function
Temporal toggle of
interface protocol:
BiSS C ↔ SSI
AUTORES
Addr. 0x44; bit 1:0
Function
...0xF
Code
00
No automatic reset
Table 70: Implemented commands
01
SOFT_RES after error AM_MIN, timeout 8 ms
SOFT_RES after error AM_MIN, timeout 16 ms
SOFT_RES after error AM_MIN, timeout 32 ms
10
11
The command SOFT_RES resets internal state ma-
chines, counters, and the status registers. The config-
uration RAM is not reset here. During the command
execution a write access to the configuration RAM is
still possible, whereas the external EEPROM is not ac-
cessible.
Table 72: Automatic reset function
For as long as the amplitude of the master track is too
low or the AM_MIN error is set, SOFT_RES is active.
When AM_MIN is no longer set, the timeout config-
ured using AUTORES expires. It is only after this that
SOFT_RES is reset and the device subsequently re-
turns to normal operation.
If the device is in nonius mode (see page 30), the first
conversion is used to determine the period and the re-
sult stored as an initial value for the period fraction of
the internal flash counter. If an external multiturn de-
vice is configured (MODE_MT = 00), its data is read
in and stored as the initial value for the multiturn data
fraction of the internal flash counter.
Should an AM_MIN error occur while a command or
the preset function is being carried out, SOFT_RES is
only implemented once the command has been termi-
nated.
With WRITE_CONF the internal configuration is stored
to the EEPROM. The CRC (CRC_E2P) is automat-
ically updated and written to address 0x4E or 0x4F.
For a description of the preset routine initiated by
SOFT_PRES see page 50.
The behavior of the I/O interface with an active
SOFT_RES depends on the protocol selected. For
BiSS C a zero is returned as a data value and the error
and warning bits are set; for SSI the last data value to
be output is repeated (the error bit is set if configured
via SSIE). In both cases the error state is indicated at
pin NERR by a low signal.
CRC_CHECK starts a CRC verification of the inter-
nal configuration RAM. During the check the internal
data bus may not be accessed. Should the check not
confirm the configuration data as error free, status bit
EPR_ERR is set.
Command TOG_BISS only causes the communication
protocol to switch temporarily (BiSS → SSI, or SSI →
BiSS). RAM parameter NBISS is not altered here. The
ICHAUS [ IC-HAUS GMBH ]
