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IC-MNEVALMN1D 参数 Datasheet PDF下载

IC-MNEVALMN1D图片预览
型号: IC-MNEVALMN1D
PDF下载: 下载PDF文件 查看货源
内容描述: 25位游标编码器, 3 -CH 。采样13位仙/ D插值 [25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION]
分类和应用: 编码器
文件页数/大小: 59 页 / 1705 K
品牌: ICHAUS [ IC-HAUS GMBH ]
 浏览型号IC-MNEVALMN1D的Datasheet PDF文件第39页浏览型号IC-MNEVALMN1D的Datasheet PDF文件第40页浏览型号IC-MNEVALMN1D的Datasheet PDF文件第41页浏览型号IC-MNEVALMN1D的Datasheet PDF文件第42页浏览型号IC-MNEVALMN1D的Datasheet PDF文件第44页浏览型号IC-MNEVALMN1D的Datasheet PDF文件第45页浏览型号IC-MNEVALMN1D的Datasheet PDF文件第46页浏览型号IC-MNEVALMN1D的Datasheet PDF文件第47页  
iC-MN 25-BIT NONIUS ENCODER  
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION  
Rev D1, Page 43/59  
Status Register  
ROM has been recognized, EPR_ERR remains set  
The status register is reached by a read access to ad- even after SOFT_RES.  
dresses 0x75 to 0x77. In the event of an error the  
relevant bit is set and maintained until the status reg- CMD_CNV and CMD_EXE are signaled on the same  
ister is read out or the command SOFT_RES is per- status bit and not stored, as opposed to the other  
formed (with the exception of status bits EPR_ERR status bits. CMD_CNV is set on the initialization  
and CMD_EXE). The status register can be accessed of a command which requires the internal converter.  
independent of the internal state of operation.  
CMD_EXE is set on commands which employ the in-  
ternal data bus.  
STATUS  
Addr. 0x75; bit 7:0  
R
STATUS  
Addr. 0x77; bit 7:0  
R
Bit  
7
Name  
TH_WRN  
Description of status message  
Excessive temperature warning  
Bit  
7
Name  
Description of status message  
CMD_EXE Command execution in progress, or  
CMD_CNV iC-MN in startup phase  
6
EPR_ERR Configuration error on startup:  
- No EEPROM (flag EPR_NO set)  
6
5
4
3
2
1
0
AN_Min  
AN_Max  
ACN_Min  
Signal error: poor level (nonius track)  
Signal error: clipping (nonius track)  
Control error: range at min. limit  
- Invalid check sum (flag EPR_NV set)  
5
4
3
2
1
FQ_WDR  
Excessive signal frequency on master track*:  
on current readout request  
FQ_STUP Excessive signal frequency on master track*:  
during startup  
ACN_Max Control error: range at max. limit  
AS_Min  
AS_Max  
ACS_Min  
Notes  
Signal error: poor level (segment track)  
Signal error: clipping (segment track)  
Control error: range at min. limit  
NON_CTR Period counter consistency error:  
counted period calculated Nonius position  
Multiturn data consistency error:  
counted multiturn external MT data  
Multiturn communication error:  
- Error bit set  
MT_CTR  
MT_ERR  
Error indication logic: 1 = true, 0 = false  
Table 75: Status register 0x77  
- CRC error  
- No start bit  
- General communication error  
Non-Volatile Diagnosis Memory  
By enabling E2EPR all status messages can be stored  
to the external EEPROM the first time they occur  
(physical EEPROM addresses 0x75 to 0x77).  
0
MT_WRN  
Notes  
Multiturn data indicates warning message  
(BiSS warning bit set)  
*) Relevant for nonius synchronization  
modes (MODE_ST = 0x00 to 0x0B); the  
warning threshold can be set using  
parameter FRQ_TH;  
On a system startup iC-MN reads in the status mes-  
sages already stored in the EEPROM. As soon as an  
error message occurs which has not been noted in the  
external memory the corresponding status register bit  
is transfered to the EEPROM. This way a "cumulative"  
error register is compiled in which all messages are  
stored which occur during operation. Only the current  
errors can be read out via the status register (BiSS ad-  
dresses 0x75 to 0x77).  
Error indication logic: 1 = true, 0 = false  
Table 73: Status register 0x75  
STATUS  
Addr. 0x76; bit 7:0  
R
Bit  
7
Name  
ACS_Max  
Description of status message  
Control error: range at max. limit  
Signal error: poor level (master track)  
Signal error: clipping (master track)  
Control error: range at min. limit  
6
AM_Min  
AM_Max  
ACM_Min  
5
The cumulative errors which are stored at EEPROM  
addresses 0x75 to 0x77 can only be read out via BiSS  
with CFG_E2P > 000 and PROT_E2P = 00 to bank 1,  
address 0x35-0x37 (see page 52 ff. for memory map).  
4
3
ACM_Max Control error: range at max. limit  
2
CT_ERR  
RF_ERR  
Readout cycle repetition to short*  
1
Excessive SSI clock frequency: conversion  
data not valid when latching data for output.  
Note: Once configuration has been completed and be-  
fore the system is delivered the data at the EEPROM  
addresses 0x75 to 0x77 should be initialized with ze-  
roes.  
0
TH_ERR  
Notes  
Excessive temperature error  
*) Relevant for nonius synchronization  
modes MODE_ST = 0x00 to 0x07  
(calculation routines must end before a new  
request is received)  
Error indication logic: 1 = true, 0 = false  
E2EPR  
Addr. 0x41; bit 7  
Description  
Code  
Table 74: Status register 0x76  
0
1
Disabled  
EEPROM savings of cumulative status messages  
enabled  
EPR_ERR indicates that no EEPROM was found on  
system startup (EPR_NO) or that a CRC error was rec-  
ognized for the internal setup (EPR_NV). If no EEP-  
Table 76: Diagnosis memory enable  
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