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IC-MNEVALMN1D 参数 Datasheet PDF下载

IC-MNEVALMN1D图片预览
型号: IC-MNEVALMN1D
PDF下载: 下载PDF文件 查看货源
内容描述: 25位游标编码器, 3 -CH 。采样13位仙/ D插值 [25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION]
分类和应用: 编码器
文件页数/大小: 59 页 / 1705 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-MN 25-BIT NONIUS ENCODER  
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION  
Rev D1, Page 37/59  
RSSI  
Code  
0
Addr. 0x3F; bit 4  
Output Options  
Ring operation  
Normal output  
If the clock count exceeds the data length, zero bits  
are supplied.  
ESSI  
Addr. 0x3F; bit 5  
Error bit output  
Not included  
Error bit enabled  
Code  
1
Ring operation  
0
1
Notes  
When enabling RSSI with the BiSS C protocol, pin  
SLI reads in data to be output via SLO.  
Table 53: Error bit  
Table 55: Ring operation  
GRAY_SCD  
Addr. 0x3F; bit 7  
Data format  
The behavior of the output data depending on the  
sense of rotation can be altered using pin DIR or via  
register DIR. Both signals are EXOR-gated and switch  
output data from increasing to decreasing values or  
vice versa.  
Code  
0
1
Binary coded  
Gray coded  
Table 54: Data format (covers MT and ST data)  
DIR  
Code  
0
Addr. 0x3D; bit 6  
Code direction  
Not inverted  
Inverted  
1
Table 56: Code direction up/down  
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