iC-JX
16-FOLD 24 V HIGH-SIDE DRIVER WITH µC INTERFACE
Rev C1, Page 26/36
DESCRIPTION OF FUNCTIONS
Interfaces
Operation with a parallel interface
iC-JX can be operated with either a serial or parallel The parallel interface in iC-JX consists of 8 data, 5 ad-
interface. This is set using pin NSP. When this pin is dress and 3 control lines. Address lines A4...0 are
connected to VDD the device works in parallel mode. used to select the registers in iC-JX. The addresses
With NSP connected to ground iC-JX operates in se- are accepted with the falling edge of chip select signal
rial mode.
NCS. Control lines NRD and NWR govern read and
write access. A circuit diagram of the parallel micro-
controller interface is given in Figure 6.
5V
5V
24V
24V
24V
C2
100nF
C1
100nF
5V
5V
VDD
VCC
POE
VB1
IO1
NSP
ADDRESS
DECODER
Nibble 0
Nibble 1
Nibble 2
Nibble 3
S1
NCS
NWR
NRD
S2
S3
S4
IO2
IO3
IO4
NWR
NRD
A0
A1
A2
A3
0
1
2
3
4
VB2
IO5
IO6
IO7
S5
S6
S7
R1
IO8
A4
S8 R2
R3
S9
A(7:0)
R5
D0
D1
D2
D3
D4
D5
D6
D7
0
1
2
3
4
5
6
7
VB3
IO9
R7
R4
S10
R9
R6
µC
I010
I011
I012
R10
S11
R8
S12
VB4
IO13
IO14
IO15
IO16
D(7:0)
LA1
LA2
REL1
REL2
NINT
INT
A/D
CONVERTER
CONTROL
REGISTER
iC-JX
NRES
MQFP52
RSET VREF BLFQ CLK
GNDA GNDD
NRES
5V
5V
optional
5V
1.25MHz
RESET
CONTROLLER
2.5V
10 Hz
Figure 6: Example application using a parallel interface
Operation with a serial interface
serial-peripheral interface (SPI) has been integrated
To reduce the number of lines running between the into iC-JX. In order to ensure communication between
microcontroller and iC-JX and thus to economize on the iC-JX and standard micro controllers, address and
the use of optocouplers between the former and either data words are both eight bit wide. A possible wiring is
one or several iCs in a unit, for example, an extended shown in Figure 7.
ICHAUS [ IC-HAUS GMBH ]
