IBM PowerPRS Q-64G
Packet Routing Switch
Preliminary
5.1.6 BIST Counter Register
Address
x‘06’
Access Type
Reset Value
Read/Write
‘0000 0000 0000 0000 0000 0000 0000 0000’
Reserved
BIST Cycle Count
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Bit(s)
0:8
Field Name
Reserved
Description
Reserved.
9:31
BIST Cycle Count
Specifies the number of BIST cycles to be performed.
5.1.7 BIST Data Register
This register, along with the BIST Select Register (page 71), provides indirect read/write access to the
internal pseudorandom pattern generator (PRPG) and multiple-input signature (MISR) registers.
Address
x‘07’
Access Type
Reset Value
Read/Write
Undefined
Reserved
PRPG/MISR Data
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Bit(s)
0:8
Field Name
Reserved
Description
Reserved.
Contains the data that has been or will be exchanged using the settings provided in the BIST Select
Register.
9:31
PRPG/MISR Data
Register Descriptions
Page 70 of 199
prsq-64g.01.fm
December 20, 2001
IBM [ IBM ]
