IBM PowerPRS Q-64G
Packet Routing Switch
Preliminary
Table 5-1. Register Map (Page 4 of 4)
Register Name
Address
Access
Page
Debug Facilities Registers: x‘64’ to x‘7E’
Debug Bus Select Register
x‘64’
x‘65’
Read/Write
Read/Write
Read/Write
Read Only
Read Only
Read Only
Read/Write
Read/Clear
Read/Clear
Read/Write
Read/Write
Read/Write
Read/Write
Read Only
Read/Write
Read/Write
140
142
142
143
144
145
146
147
147
148
150
151
152
152
153
154
Send Grant Disable Register
Force Send Grant Register
x‘66’
Send Grant Status Registers
x‘67’ to x‘6A’
x‘6B’ to x‘6E’
x‘6F’ x‘72’
x‘73’ and x‘74’
x‘75’
Subswitch Element Occupancy (1) Registers
Subswitch Element Occupancy (2) Registers
Look-Up Table Registers
Blue Idle Packet or Data Packet Received Register
Red Idle Packet or Data Packet Received Register
Miscellaneous Debug Register
x‘76’
x‘77’
Force Packet Capture Ports Register
Force Packet Capture Header Register
Force Packet Capture Mask Register
Packet Captured Registers
x‘78’
x‘79’
x‘7A’
x‘7B’ and x‘7C’
x‘7D’
Unilink Debug Control Register
Unilink Force Error Register
x‘7E’
Reserved
x‘7F’
Register Descriptions
Page 66 of 199
prsq-64g.01.fm
December 20, 2001
IBM [ IBM ]
