IBM PowerPRS Q-64G
Packet Routing Switch
Preliminary
Table 4-1. SHI OpCode Commands
OpCode
0
Operation
No-Op
Type
Address
Description
Required after a read register command. Clears the data out of the SHI
Instruction Register (page 61).
33-bit
x‘00’
Loads the content of the register specified by the address field in the
SHI Instruction Register into the data field of the SHI Instruction Regis-
ter. This command requires a no-op command (OpCode ‘0’) to send the
read result and parity over the SHISerialDataOut signal and clear the
data field in the SHI Instruction Register.
0
Read register
9-bit
x‘01’ to x‘7F’
Writes the value of the data field in the SHI Instruction Register into the
register specified by the address field in the SHI Instruction Register.
1
Write register
41-bit
x‘01’ to x‘7F’
Note: Each read register command must be followed by the no-op command.
4.2 SHI Instruction Execution
An SHI instruction is invoked when the SHISelectIn# input is set to ‘0’. During execution, data transmitted
over SHISerialDataIn is shifted into the SHI Instruction Register. Shifted serial data must begin with the least
significant bit and end with the most significant bit of the instruction to be executed. This scan operation is
synchronized with SHIClockIn. Instructions always execute one SHI clock cycle after the SHISelectIn# signal
changes from an active to an inactive state.
4.3 SHI Parity Checking
Each instruction scanned into the SHI Instruction Register has one bit of parity protection. The parity bit is the
most significant bit (bit 0) of the SHI Instruction Register, and is the last bit scanned.
The SHI Instruction Register checks whether an incoming instruction has the required odd parity. If a parity
error is detected on a received instruction, the execution of that instruction is inhibited and the SHI parity error
bit is set in the Status Register (page 120). All SHI command bits are protected by the parity bit (that is, if
SHISelectIn# is active during n SHI clock cycles, the parity is checked on n bits).
4.4 SHI Parity Generation
Both incoming and outgoing data carry odd parity. This parity is computed for each SHI clock cycle when the
SHISelectIn# signal is active. The computed parity is sent on SHISerialDataOut when the SHISelectIn# signal
is deactivated.
Programming Interface
Page 62 of 199
prsq-64g.01.fm
December 20, 2001
IBM [ IBM ]
