IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
3.10.5 8-Bit Mode Processor Interface Timing
Figure 25: Processor Read Access in 8-bit Byte Mode
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
MP_CLK
MP_SEL
MP_WR
Read cycle request
Read cycle request
MP_ADD[7:2]
MP_ADD_PRTY
MP_DATA[7:0]
Output
MP_DATA_PRTY
Output
Arm
Wait
Wait
Wait
Data
Arm
Wait
Wait
Wait
Data
MP_PRDY
Data sampled
by processor
Data sampled
by processor
Figure 26: Processor Write Access in 8-bit Byte Mode
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
MP_CLK
MP_SEL
Write cycle request
Write cycle request
MP_WR
MP_ADD[7:2]
MP_ADD_PRTY
MP_DATA[7:0]
Input
MP_DATA_PRTY
Input
MP_PRDY
Arm
Wait
Data
Arm
Wait
Data
Data sampled
by Converter
Data sampled
by Converter
Note: MP_SEL can be active one more cycle without impact on the processor access, however the min-
imum deactivate time must remain two clock cycle times.
prssi.02.fm
March 1, 2001
Functional Description
Page 53 of 154
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