IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
4.1 Error Detection, Reporting, and Interrupt Registers
The converter uses a common strategy for error detection, error reporting, and interrupt generation:
- Each error is detected by an individual checker (for instance parity checker)
- An error must be individually enabled in the CHECKER_ENABLE_REGISTER to be reported into
EVENT_REGISTER
- An error must be individually enabled in the INTERRUPT_ENABLE register to generate an interrupt
- The INTERRUPT_REGISTER_INDIRECTION is the first register to read when an interrupt is raised.
The interrupt cause can either be present in the register itself or be via an indirection to another
EVENT_REGISTER
- For some specific errors (Parity and CRC), it is possible to discard or not discard the corresponding
packet, depending on the setting of the corresponding configuration register
The interrupt routine is as follows:
1. The processor reads the INTERRUPT_REGISTER_INDIRECTION for the interrupt cause (either
directly or indirectly via a second read into the EVENT_REGISTER flagged by
INTERRUPT_REGISTER_INDIRECTION)
2. After processing the interrupt routine, the processor resets only the EVENT_REGISTER. The reset is
under mask, so the whole byte of a register can be reset by writing x'FF' inside, or it can be reset a
single bit at a time by writing a '1' at the bit position in the byte to be reset. However two bits of a byte
cannot be reset simultaneously (applicable only to Event registers @ 10, 30, 88)
prssi.02.fm
Converter Configuration Table Registers
Page 55 of 154
March 1, 2001
IBM [ IBM ]
