IBM3229P2035
IBM Packet Routing Switch Serial Interface Converter
Advance
4.1.1 Register Map
Register Name
Setup1_X PATH
Word Address
x‘00’
x’04’
x’08’
x’0C’
x’10’
x’14’
x’18’
x’20’
x’24’
x’28’
x’2C’
x’30’
x’34’
x’38’
x’40’
x’44’
x’48’
x’4C’
x’50’
x’54’
x’60’
x’64’
x’68’
x’6C’
x’70’
x’74’
x’80’
x’84’
x’88’
x’8C’
x’90’
x’94’
x’98’
x’9C’
x’A0’
x’A4’
x’C0’
x’C4’
x’C8’
x’CC’
Byte Address
x‘00 to 03’
x’04 to 07’
x’08 to 0B’
x’0C to 0F’
x’10 to 1B’
x’14 to 17’
x’18 to 1B’
x’20 to 23’
x’24 to 27’
x’28 to 2B’
x’2C to 2F’
x’30 to 3B’
x’34 to 37’
x’38 to 3B’
x’40 to 43’
x’44 to 47’
x’48 to 4B’
x’4C to 4F’
’50 to 53’
Setup 2_X PATH
Control_X PATH
CRC_Error_Count_X
Event 1 _X
Event 1 Checker Enable _X
Interrupt Enable _X
Setup1_Y PATH
Setup2_Y PATH
Control_Y PATH
CRC_Error_Count_Y
Event 1 _Y
Event 1 Checker Enable _Y
Interrupt Enable _Y
DASL M3 Picocode X
Shared DASL Controller: SDC_Debug_CNTL X
Shared DASL Controller: SDC_Debug_Data_In X
Shared DASL Controller: SDC Debug_Data_Out X
Shared DASL Controller: SDC_Debug_Data_Address X
SHared DASL Controller: SDC_ Status_Reg X
DASL M3 Picocode Y
’54 to 57’
x’60 to 63’
x’64 to 67’
x’68 to 6B’
x’6C to 6F’
’70 to 73’
Shared DASL Controller: SDC_Debug_CNTL Y
Shared DASL Controller: SDC_Debug_Data_In Y
Shared DASL Controller: SDC Debug_Data_Out Y
Shared DASL Controller: SDC_Debug_Data_Address Y
Shared DASL Controller: SDC_ Status_Reg Y
Event 2 Checker Enable _X and _Y
Event 2 Interrupt Enable_X and _Y
Event 2_X and _Y
’74 to 77’
x’80 to 83’
x’84 to 87’
x’88 to 8B’
x’8C to 8F’
x’90 to 93’
x’94 to 97’
x’98 to 9B’
x’9C to 9F’
x’A0 to A3’
x’A4 to A7’
x’C0 to C3’
x’C4 to C7’
x’C8 to CB’
x’CC to CF’
Test Status _X_Y
Switch X PLL
Switch Y PLL
Chip ID
PE PLL Register
Common Control Register
Interrupt Register Indirection
Ingress_PE_Interface
Egress_PE_Interface
PE (Common)
PARITY_Error_count
Converter Configuration Table Registers
Page 56 of 154
prssi.02.fm
March 1, 2001
IBM [ IBM ]
