IBM3229P2035
IBM Packet Routing Switch Serial Interface Converter
Advance
4. Converter Configuration Table Registers
This module contains all the configuration registers that the converter needs to operate.
• Registers are referenced from @00 up to @FF.
• There are two ways to access the configuration table registers:
- During the POR procedure, some registers can be preset to start the system as predetermined.
- Using the microprocessor interface, the configuration table register can be either READ or WRITE.
• Write access to a read-only register is not valid and does not change the held value of that register.
• All errors are logged (not first failure data capture).
• All bits in configuration table registers are active binary 1.
• The registers can be accessed either in 8-bit (byte) mode or in 32-bit (burst) mode through bursts of 4x 8-
bits modes (for I960 Processors). In 32-bit mode, the least significant byte is sent first, then the second
least significant byte, and so forth.
•
The registers are based on little endian notation.
Figure 27: Register Mapping
32-Bit Register
5
5
2
2
15 14
8
3
3
31 30 29 28
26 25 24
20 19
18 17 16
13 12 11 10
9
7
7
6
6
4
4
1
1
0
0
27
3
23 22 21
7
6
5
4
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Address xxxxxx10
(Byte 2)
Address xxxxxx01
(Byte 1)
Address xxxxxx00
(Byte 0)
Address xxxxxx11
(Byte 3)
8-Bit Registers
Figure 28: Register Addressing
Address Bits
7
6
0
0
5
0
1
4
3
2
1
0
Plane X Clock Domain
Plane Y Clock Domain
0
0
DASL Plane X Clock Domain
DASL Plane Y Clock Domain
0
0
1
1
0
1
1
1
0
1
Microprocessor Clock Domain
Protocol Engine Clock Domain
Byte
Selection
In a Register
Register Selection
Per Clock Domain
Converter Configuration Table Registers
Page 54 of 154
prssi.02.fm
March 1, 2001
IBM [ IBM ]
