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IBM3009K2672 参数 Datasheet PDF下载

IBM3009K2672图片预览
型号: IBM3009K2672
PDF下载: 下载PDF文件 查看货源
内容描述: [Framer, CMOS, CBGA474, CERAMIC, BGA-474]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 287 页 / 4239 K
品牌: IBM [ IBM ]
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IBM3009K2672  
IBM SONET/SDH Framer  
SONET / SDH Pin Descriptions (Sheet 2 of 3)  
Pin Name  
Pin No.  
I/O  
Type  
Pin Description  
Transmitter Low Power 2:  
TXLPOW2  
M16  
I
LVTTL-5s  
From external optical transmitter indicating low power output. In parallel  
mode, only TXLPOW1 is used.  
Transmitter Low Power 3:  
TXLPOW3  
TXLPOW4  
P16  
T16  
I
I
LVTTL-5s  
LVTTL-5s  
From external optical transmitter indicating low power output. In parallel  
mode, only TXLPOW1 is used.  
Transmitter Low Power 4:  
From external optical transmitter indicating low power output. In parallel  
mode, only TXLPOW1 is used.  
Transmitter Shut Down 1:  
To shut down the respective optical transmitter.  
TXSDOWN1  
TXSDOWN2  
TXSDOWN3  
TXSDOWN4  
K15  
M15  
P15  
C07  
O
O
O
LVTTL-5sd  
LVTTL-5sd  
LVTTL-5sd  
The level of this signal for shutdown depends on the transmitter used. The  
SONET/SDH framer is programmed accordingly via the management inter-  
face. In parallel mode, only TXSDOWN1 is used.  
Transmitter Shut Down 2:  
To shut down the respective optical transmitter.  
The level of this signal for shutdown depends on the transmitter used. The  
SONET/SDH framer is programmed accordingly via the management inter-  
face. In parallel mode, only TXSDOWN1 is used.  
Transmitter Shut Down 3:  
To shut down the respective optical transmitter.  
The level of this signal for shutdown depends on the transmitter used. The  
SONET/SDH framer is programmed accordingly via the management inter-  
face. In parallel mode, only TXSDOWN1 is used.  
Transmitter Shut Down 4:  
To shut down the respective optical transmitter.  
The level of this signal for shutdown depends on the transmitter used. The  
SONET/SDH framer is programmed accordingly via the management inter-  
face. In parallel mode, only TXSDOWN1 is used.  
O
I
LVTTL-5sd  
PPECL  
Serial SONET/SDH Receive Data 1: (0=true, 1=inverted)  
RXSDAT1(0)  
RXSDAT1(1)  
E19  
F18  
The supported data rates on RXSDAT1 are 155.52 and 622.08 Mb/s. An  
external 100 resistor is required as close as possible to the SONET/SDH  
framer.  
Serial SONET/SDH Receive Data 2: (0=true, 1=inverted)  
The supported data rate on RXSDAT2-4 is 155.52 Mb/s. An external 100 Ω  
resistor is required as close as possible to the SONET/SDH framer.  
RXSDAT2(0)  
RXSDAT2(1)  
K18  
J19  
I
I
I
PPECL  
PPECL  
PPECL  
Serial SONET/SDH Receive Data 3: (0=true, 1=inverted)  
The supported data rate on RXSDAT2-4 is 155.52 Mb/s. An external 100 Ω  
resistor is required as close as possible to the SONET/SDH framer.  
RXSDAT3(0)  
RXSDAT3(1)  
P18  
N19  
Serial SONET/SDH Receive Data 4: (0=true, 1=inverted)  
The supported data rate on RXSDAT2-4 is 155.52 Mb/s. An external 100 Ω  
resistor is required as close as possible to the SONET/SDH framer.  
RXSDAT4(0)  
RXSDAT4(1)  
V18  
U19  
RXPDAT1(7)  
RXPDAT1(6)  
RXPDAT1(5)  
RXPDAT1(4)  
RXPDAT1(3)  
RXPDAT1(2)  
RXPDAT1(1)  
RXPDAT1(0)  
D16  
F15  
B15  
D15  
A14  
D14  
C14  
B13  
Parallel SONET/SDH Receive Data 1:  
Byte-parallel input data from external SDH/SONET deserializer/demux, e.g.,  
AMCC 3017. Bit 0 is the LSB. This data must be byte-aligned to the bytes in  
the incoming SONET/SDH frame.  
I
LVTTL-5sd  
Pin Information  
ssframer.01  
8/27/99  
Page 30 of 279  
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