IBM3009K2672
IBM SONET/SDH Framer
Utopia Levels 1 and 2 Block ATM Features
The SONET/SDH framer provides a PHY Layer interface with cell level handshaking for ATM applications.
The interface can be configured to be two independent UTOPIA Level 1 interfaces or one UTOPIA Level 2
interface. The UTOPIA Level 1 interfaces have an 8-bit wide data path, are independent of each other, and
1
can each support a single cell stream (contained in a C-4 ). The UTOPIA Level 1 clock frequency can range
from 2 to 25 MHz. The UTOPIA Level 2 interface can support either an 8-bit or 16-bit data bus. Up to four cell
streams (contained in four C-4s) can be supported with multi-PHY operation. Single-PHY operation is pro-
2
vided so that cell streams in concatenated payloads (C-4-4c ) can be supported. In multi-PHY mode, poll-
ing/selection can be controlled by one or four CLAV signals. The UTOPIA Level 2 clock frequency can range
from 2 to 50 MHz. A unique port address can be assigned to each of the APH macros through control regis-
ters. Depending on the payload being processed (C-4-4c or C-4), the PT#Conf2:NEWCONF,
HT#Conf2:ACBTXTHPAE, HR#Conf10:PAFT and PR#Conf2:RXTHBUF registers need to be set as indicated
in the memory map section of this databook to ensure the proper operation of the transmit and receive CLAV
signals.
Utopia Level 2+ Block PPP Features
The SONET/SDH framer provides a PHY Layer interface with chunk level handshaking for PPP applications.
The data bus is 16-bits wide with a single multiplexed CLAV (chunk available) indication being employed for
controlling transfers for both single and multi-PHY modes. A multi-PHY mode that follows UTOPIA Level 2
style handshaking is provided for terminating up to four C-4 data streams. The method of polling and PHY
selection as outlined in [UL2v1] is followed. A single-PHY mode is provided for UTOPIA Level 2 style hand-
shaking in cases where a concatenated payload, such as a C-4-4c, is being terminated. See UTOPIA Inter-
face on page 14 for details on the handshaking.
The UTOPIA Level 2+ interface is basically a UTOPIA Level 2 interface plus some additional signals to facili-
tate frame delineation. These extra handshaking and status signals are added to indicate start and end-of-
frame, FCS error, abort, last byte of frame is in the MSB position, and start of chunk. The frame data is
passed across the interface in programmable size data blocks called chunks. Chunks are programmed to be
16, 32, 48, or 64 bytes. Data from several frame streams can be broken up into chunks and multiplexed
to/from the appropriate PHY in much the same way that ATM cells are. The advantage to “chunking” the
frame data is that short frames on PHY N do not have to wait for a long frame that is currently being trans-
ferred on PHY M to be completely transmitted/received. However, it is the responsibility of the ATM or con-
trolling layer to ensure that PHYs are not starved or stuffed to overflowing. It is, therefore, strongly suggested
that the UTOPIA Level 2+ interface clocks be run at, or very near 50 MHz, even though the frequency of the
clocks can range down to 2 MHz. A unique port address can be assigned to each of the APH macros through
control registers.
Depending on the payload being processed (C-4-4c or C-4) and the chunk size, the PT#Conf2:NEWCONF,
HT#Conf2:ACBTXTHPAE, HR#Conf10:PAFT and PR#Conf2:RXTHBUF registers need to be set as indicated
in the memory map section of this databook to ensure the proper operation of the transmit and receive CLAV
signals.
Transmit Telecom Bus Interface
The transmit Telecom Bus interface of the SONET/SDH framer provides an interface for accepting TDM data
formatted as either an AU-4 or VC-4 signal. The GContTx#(1:0) bits in the GContTX register are used to
1. A C-4 is a VC-4/SPE without POH. That is, it is the STM-1/STS-3c payload or it can be one of the four STM-4/STS-12 payloads.
2. A C-4-4c is a VC-4-4c/SPE without POH. That is, it is the STM-4c/STS-12c payload.
Operation
ssframer.01
8/27/99
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