IBM3009K2672
IBM SONET/SDH Framer
• Flag (7E H) and Control Escape (7D H) characters in the data plus FCS are stuffed per section 4.2 of
[RFC1662].
• Frame delineation flags are inserted around the frame. At least one or at least two frame delineation flags
can be inserted between transmitted frames as selected by a control bit (MFLAG).
• Transmit ACB FIFO underrun in the middle of a frame transfer causes an illegal sequence (7D7E H) to be
transmitted.
• Inter-frame flag fill is added per section 4.4.1 of [RFC1662] to fill space between frames.
• Transmit C2 and H4 bytes can be programmed to appropriate values to satisfy [RFC1619].
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• Optional scrambler (1+X polynomial) can be used to scramble HDLC stream before insertion into trans-
mit SONET/SDH frame.
• PPP frames are mapped into SONET/SDH payload per [RFC1619].
Received frame data is processed per [RFC1662] and [RFC1619] as follows:
• The received frame data extracted from the SONET/SDH payload can optionally be descrambled with a
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descrambler (1+X polynomial).
• Frame delineation is performed by examining the payload stream for flag characters (7E H) per section
4.1 of [RFC1662]. All flags are discarded.
• All control escape sequences are processed (i.e., destuffed) per section 4.2 of [RFC1662].
• Either a 16-bit or 32-bit FCS is checked over the frame data per [RFC1662]. The FCS is not discarded.
• FCS errors are detected and registered in interrupt request bits, counted in an 8-bit combined Abort/FCS
error counter, and signaled on an external FCS error pin.
• FCS check can be disabled through control bits. In this case, counters, interrupt request bits, and the
FCS error pin are not active.
• Transparent mode can be enabled where chunks are passed directly into the receive UTOPIA Level 2+
interface without any frame delineation signals or processing.
• When not in transparent mode, frames (after destuffing and including FCS) that are greater than or equal
to a user-defined maximum frame length (MAXFL(15:0)) are aborted.
• When not in transparent mode, frames (after destuffing and including FCS) that are less than a user-
defined minimum frame length (MINFL(6:0)) can optionally be aborted based on a control bit setting
(DMINF). This is used to comply with section 4.3 of [RFC1662].
• 8-bit counters are provided for counting frames that are discarded due to being too short or too long.
• Illegal sequences that are detected (7D7E H) are registered in an interrupt request bit and are counted in
an 8-bit combined Abort/FCS Error counter, and signaled on an external Abort pin.
• A control bit is provided (FCSABT) to enable FCS errors and aborts to both be indicated on the FCS pin,
or on their respective pins.
• Receive FIFO overflow causes an Abort to be signaled on the external pin.
• The remainder of all aborted frames are discarded and not counted as an FCS error.
ssframer.01
8/27/99
Operation
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IBM [ IBM ]
