Preliminary
PowerPC 405EP Embedded Processor Data Sheet
Signal Functional Description (Part 4 of 6)
Secondary multiplexed signals are shown in brackets.
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 31 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 31 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Bus Control Signals” on page 32.
Signal Name
Description
I/O
Type
Notes
5V tolerant
3.3V LVTTL
PerOE
Peripheral output enable.
O
7
Peripheral read/write. High indicates a read from memory, low
indicates a write to memory.
5V tolerant
3.3V LVTTL
PerR/W
PerReady
[PerBLast]
PerClk
O
I
5V tolerant
3.3V LVTTL
Ready to transfer data.
1
Used to indicates the last transfer of a memory access.
To access this function, software must toggle a DCR bit.
5V tolerant
3.3V LVTTL
I/O
O
O
1, 7
5V tolerant
3.3V LVTTL
Peripheral clock to be used by peripheral slaves.
Peripheral reset to be used by peripheral slaves.
5V tolerant
3.3V LVTTL
ExtReset
Internal Peripheral Interface
5V tolerant
3.3V LVTTL
UART0_Rx
UART0_Tx
UART0 Serial Data In.
I
O
I
1
6
1
5V tolerant
3.3V LVTTL
UART0 Serial Data Out.
UART0 Data Carrier Detect.
5V tolerant
3.3V LVTTL
[UART0_DCD]
To access this function, software must toggle a DCR bit.
UART0 Data Set Ready.
5V tolerant
3.3V LVTTL
[UART0_DSR]
UART0_CTS
[UART0_DTR]
UART0_RTS
[UART0_RI]
[UART1_Rx]
[UART1_Tx]
I
I
1
1
To access this function, software must toggle a DCR bit.
5V tolerant
3.3V LVTTL
UART0 Clear To Send.
UART0 Data Terminal Ready.
5V tolerant
3.3V LVTTL
O
O
I
To access this function, software must toggle a DCR bit.
5V tolerant
3.3V LVTTL
UART0 Request To Send.
6
1
1
UART0 Ring Indicator.
5V tolerant
3.3V LVTTL
To access this function, software must toggle a DCR bit.
UART1 Serial Data In.
5V tolerant
3.3V LVTTL
I
To access this function, software must toggle a DCR bit.
UART1 Serial Data Out.
5V tolerant
3.3V LVTTL
O
To access this function, software must toggle a DCR bit.
IICSCL
IICSDA
IIC Serial Clock.
IIC Serial Data.
I/O
I/O
3.3V IIC
3.3V IIC
1, 2
1, 2
Interrupts Interface
Interrupt requests
5V tolerant
3.3V LVTTL
[IRQ0:6]
I
1
To access this function, software must toggle a DCR bit.
Page 36 of 52
6/9/03
IBM [ IBM ]
